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US5321884A Expired / Lapsed US ⏱️ 0.0 years remaining

Multilayered flexible circuit package

Assignee: International Business Machines Corp
•
Filing: 1993-05-20
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Granted: 1994-06-21
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Expires: 2013-05-20
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Abstract

Abstract An electronic package which includes a rigid first substrate (e.g., ceramic) having a plurality of conductive pins spacedly located therein. These pins each include one end portion extending below an undersurface of the substrate for positioning and electrically coupling within a second substrate (e.g., printed circuit board), while also including an opposite end portion which projects from an opposite, upper surface of the first substrate. These upwardly projecting end portions are designed for accommodating, in stacked orientation, a plurality of thin film, flexible circuitized substrates thereon, each of these substrates being electrically coupled to a respective pin, if desired, using a solder composition. In one example of the invention, solder hierarchy for various solders is used, one solder being used to connect the substrates and respective pins, and a second solder (having a higher melting point and different composition from the first solder) used to connect the semiconductor devices (chips) of the flexible circuitized substrates to the conductive circuitry of the substrates. Hydrogen is preferably used to effect solder reflow for the solder which couples the flexible substrates to the respective pins. In an alternate embodiment, the flexible circuitized substrates may include at least two separate conductive layers as part thereof.

Inventors

  • 👤 Joseph G. Ameen
  • 👤 Joseph Funari
  • 👤 David W. Sissenstein, Jr.

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 12:33
CPC Classifications
H; H05; H05K; H05K7/00; H05K7/02; H05K7/023; H05K1/00; H05K1/02; H05K1/14; H05K1/144; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W70/62; H10W70/63; H10W70/635; H10W70/67; H10W70/688; H10W90/00; H10W90/701; H10W90/721; H10W90/722; H10W90/724; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/49826; Y10T29/49828; Y10T29/49829

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 210 words
A method of making an electronic package, said method comprising: providing a substantially rigid first substrate including a first surface and at least two electrically conductive pins spacedly located therein, said pins including at least one end portion projecting above said first surface; positioning a plurality of individual thin film, flexible circuitized substrates in stacked and electrically insulated orientation above said first surface of said first substrate on said projecting end portions of said conductive pins, selected ones of said circuitized substrates including at least one dielectric layer, at least one layer of circuitry on said dielectric layer and at least one semiconductor device positioned on an upper surface of said substrate and electrically coupled to said circuitry, said semiconductor devices being positioned on said upper surfaces of said flexible circuitized substrates and electrically coupled to said circuitry prior to said positioning of said flexible substrates on said pins in said stacked and electrically insulated orientation, said selected ones of said circuitized substrates including at least two apertures therein adapted for having a respective one of said projecting end portions of said pins located therein; and thereafter electrically connecting said circuitry of said circuitized substrates to said projecting end portions of said conductive pins in the region of said apertures.
Claim 2
Independent Claim 210 words
A method of making an electronic package, said method comprising: providing a substantially rigid first substrate including a first surface and at least two electrically conductive pins spacedly located therein, said pins including at least one end portion projecting above said first surface; positioning a plurality of individual thin film, flexible circuitized substrates in stacked and electrically insulated orientation above said first surface of said first substrate on said projecting end portions of said conductive pins, selected ones of said circuitized substrates including at least one dielectric layer, at least one layer of circuitry on said dielectric layer and at least one semiconductor device positioned on an upper surface of said substrate and electrically coupled to said circuitry, said semiconductor devices being positioned on said upper surfaces of said flexible circuitized substrates and electrically coupled to said circuitry prior to said positioning of said flexible substrates on said pins in said stacked and electrically insulated orientation, said selected ones of said circuitized substrates including at least two apertures therein adapted for having a respective one of said projecting end portions of said pins located therein; and thereafter electrically connecting said circuitry of said circuitized substrates to said projecting end portions of said conductive pins in the region of said apertures.
Claim 3
Dependent Claim 39 words
The method according to claim 1 wherein said electrically connecting said circuitry to said pins comprises providing a plurality of solder preforms on said conductive pins relative to said apertures in each of said thin film, flexible circuitized substrates.
Claim 4
Dependent Claim 22 words
The method according to claim 2 further including heating said solder preforms to effect reflow thereof into said region of said apertures.
Claim 5
Dependent Claim 14 words
The method according to claim 3 wherein said heating is accomplished using hot gas.
Claim 6
Dependent Claim 28 words
The method according to claim 4 wherein said hot gas is hydrogen, said reflow of said solder preforms occurring without the use of flux or the like materials.
Claim 7
Dependent Claim 39 words
The method according to claim 1 including providing at least one of said thin film, flexible circuitized substrates with a second layer of circuitry located on an opposite surface of said dielectric layer from said one layer of circuitry.
Claim 8
Dependent Claim 48 words
The method according to claim 6 further including providing electrically insulative means between said semiconductor device of one of said thin film, flexible circuitized substrates and said second layer of circuitry of said one of said thin film, flexible circuitized substrates having said second layer of circuitry thereon.
Claim 9
Dependent Claim 53 words
The method according to claim 1 wherein said electrically connecting of said circuitry of said thin film, flexible circuitized substrates to said projecting end portions of said conductive pins comprises providing a plurality of solder preforms on said conductive pins relative to said apertures in each of said thin film, flexible circuitized substrates.
Claim 10
Dependent Claim 58 words
The method according to claim 8 further including providing a second solder material for electrically coupling said semiconductor devices to respective ones of said thin film, flexible circuitized substrates, said second solder material having a different melting point temperature than said solder material electrically connecting said flexible circuitized substrates to said projecting end portions of said conductive pins.
Claim 11
Dependent Claim 23 words
The method according to claim 1 further including providing at least one layer of circuitry on said first surface of said first substrate.

References Cited (Backward Citations)

US4059849A Cited
US4593959A Cited
US4750092A Cited
US4788767A Cited
US5048166A Cited
US4842184A Cited
JPH0286159A Cited
US5222014A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-06-20 1997-12-20 1998-06-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-06-20 2001-12-20 2002-06-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-06-20 2005-12-20 2006-06-21 $7700.00 Window Closed / Lapsed

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