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Method and apparatus for division error detection

Assignee: Unisys Corp
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Filing: 1992-11-04
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Granted: 1994-06-14
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Expires: 2012-11-04
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Abstract

Abstract Method and apparatus for verifying the result of an arithmetic operation. The invention provides a time and cost efficient method of performing error detection on the result of an arithmetic operation; especially for a division operation. It does so through the novel use of a Carry-Save Adder (CSA). A CSA is known in the art to be faster and less costly to implement than the use of a full adder.

Inventors

  • 👤 Joseph S. Schibinger

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 17:01
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/0703; G06F11/0751

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 67 words
A system for verifying the result of an arithmetic operation comprising: a carry save adder; a plurality of exclusive OR gates coupled to a plurality of outputs of said carry save adder; an AND gate coupled to an output of each of said exclusive OR gates; wherein one of a plurality of input signals coupled to said carry save adder represents the ones complement of said result.
Claim 2
Independent Claim 67 words
A system for verifying the result of an arithmetic operation comprising: a carry save adder; a plurality of exclusive OR gates coupled to a plurality of outputs of said carry save adder; an AND gate coupled to an output of each of said exclusive OR gates; wherein one of a plurality of input signals coupled to said carry save adder represents the ones complement of said result.
Claim 3
Dependent Claim 19 words
The system of claim 1, wherein said carry save adder is comprised of a plurality of logical operation means.
Claim 4
Dependent Claim 21 words
The system of claim 1, wherein said carry save adder is combined with said exclusive OR into a single combined means.
Claim 5
Dependent Claim 50 words
The system of claim 3, wherein said combined means is comprised of: a plurality of AND gates; a OR gate coupled to a plurality of outputs to said plurality of AND gates; an exclusive OR gate coupled to a output of said OR gate and a plurality of input signals.
Claim 6
Independent Claim 110 words
A method of verifying an arithmetic operation comprising the steps of: performing the arithmetic operation using a plurality of operands yielding a result; determining the ones compliment of said result; using said ones compliment of said result and said plurality of operands as a plurality of inputs to a carry save adder to yield a sum and a carry; performing an exclusive OR of a plurality of bits of said sum and said carry to yield a plurality of error check values; performing an AND of said error check values to yield a final value equal to one; indicating an error occurred if said final value does not equal one.
Claim 7
Independent Claim 110 words
A method of verifying an arithmetic operation comprising the steps of: performing the arithmetic operation using a plurality of operands yielding a result; determining the ones compliment of said result; using said ones compliment of said result and said plurality of operands as a plurality of inputs to a carry save adder to yield a sum and a carry; performing an exclusive OR of a plurality of bits of said sum and said carry to yield a plurality of error check values; performing an AND of said error check values to yield a final value equal to one; indicating an error occurred if said final value does not equal one.
Claim 8
Dependent Claim 12 words
The method of claim 5, wherein said arithmetic operation is an addition.
Claim 9
Dependent Claim 13 words
The method of claim 5, wherein said arithmetic operation is a multiplication operation.
Claim 10
Dependent Claim 30 words
The method of claim 7, wherein said plurality of operand inputs are shifted to achieve a value equivalent to multiplying one operand input by the value of another operand input.
Claim 11
Dependent Claim 13 words
The method of claim 5, wherein said arithmetic operation is a division operation.
Claim 12
Dependent Claim 14 words
The method of claim 9 further comprising: determining the ones compliment of a divident.
Claim 13
Dependent Claim 37 words
The method of claim 10, wherein said plurality of operand inputs are replaced by a plurality of results from the division operation and said ones compliment of said result is replaced by ones compliment of the divident.
Claim 14
Dependent Claim 21 words
The method of claim 11, wherein said plurality of results from the division operation is shifted to include a remainder value.

References Cited (Backward Citations)

US3588484A Cited
US3660646A Cited
US3943487A Cited
US5018093A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-06-13 1997-12-13 1998-06-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-06-13 2001-12-13 2002-06-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-06-13 2005-12-13 2006-06-14 $7700.00 Window Closed / Lapsed

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