Method of manufacturing GaAs metal semiconductor field effect transistor

Claim 1

A method for manufacturing a GaAs field effect transistor, comprising the steps of: providing a semi-insulating GaAs semiconductor substrate; depositing a silicon film on a major surface of said substrate; forming a first sensitive film pattern on said silicon film to define a channel region; ion-implanting a first impurity into said substrate to form a channel layer as an active layer; removing said first sensitive film pattern; forming a second sensitive film pattern on said silicon film to define spaced ohmic contact areas, and implanting a second impurity through said silicon film into said substrate in only said ohmic contact areas to define spaced high concentration impurity regions beneath said the channel layer and to damage an interface of said silicon film and said substrate only in said ohmic contact areas; removing said second sensitive film pattern; forming a passivation film over said substrate after removal of said second sensitive film pattern and performing an activation annealing process so as to diffuse silicon from said silicon film into said channel layer and said high concentration impurity regions, wherein the damage to the interface of the silicon film and the substrate in the ohmic contact areas allows a greater diffusion of silicon in said high concentration impurity areas than in a remainder of said channel layer; sequentially removing said passivation film and said silicon film; forming a third sensitive film pattern on said substrate to define source/drain ohmic contact regions at a surface of said high concentration impurity regions; etching an upper surface portion of said impurity regions within said source/drain ohmic contact regions to form recessed portions therein; forming ohmic contact electrodes on recessed portions in said source-drain ohmic contact regions; etching an upper surface portion of said channel layer using a gate mask to form a recessed gate contact region; and forming a gate electrode on said recessed gate contact region.

Claim 2

A method for manufacturing a GaAs field effect transistor, comprising the steps of: providing a semi-insulating GaAs semiconductor substrate; depositing a silicon film on a major surface of said substrate; forming a first sensitive film pattern on said silicon film to define a channel region; ion-implanting a first impurity into said substrate to form a channel layer as an active layer; removing said first sensitive film pattern; forming a second sensitive film pattern on said silicon film to define spaced ohmic contact areas, and implanting a second impurity through said silicon film into said substrate in only said ohmic contact areas to define spaced high concentration impurity regions beneath said the channel layer and to damage an interface of said silicon film and said substrate only in said ohmic contact areas; removing said second sensitive film pattern; forming a passivation film over said substrate after removal of said second sensitive film pattern and performing an activation annealing process so as to diffuse silicon from said silicon film into said channel layer and said high concentration impurity regions, wherein the damage to the interface of the silicon film and the substrate in the ohmic contact areas allows a greater diffusion of silicon in said high concentration impurity areas than in a remainder of said channel layer; sequentially removing said passivation film and said silicon film; forming a third sensitive film pattern on said substrate to define source/drain ohmic contact regions at a surface of said high concentration impurity regions; etching an upper surface portion of said impurity regions within said source/drain ohmic contact regions to form recessed portions therein; forming ohmic contact electrodes on recessed portions in said source-drain ohmic contact regions; etching an upper surface portion of said channel layer using a gate mask to form a recessed gate contact region; and forming a gate electrode on said recessed gate contact region.