Patent US5313484A successfully refreshed from Google Patents.
US5313484A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Quantum box or quantum wire semiconductor structure and methods of producing same
Assignee: Fujitsu Ltd
•
Filing: 1992-06-15
•
Granted: 1994-05-17
•
Expires: 2012-06-15
Abstract
Abstract A quantum box semiconductor structure in which truncated triangular, or quadrilateral, pyramid base portions are formed on the main surface of a silicon semiconductor substrate defined, selectively, by a (111) B or a (100) plane; the triangular, or quadrilateral, truncated pyramid base portions have corresponding three, or four, (111) A plane sides, respectively. Corresponding triangular, or quadrilateral, quantum boxes of a second semiconductor material having a narrower energy band gap and larger electron affinity than the first, silicon semiconductor material of the base portions are formed on the corresponding triangular, or quadrilateral, top surfaces of the base portions and each has three, or four, corresponding (111) A plane sides. The quantum box lasers are formed in a succession of process steps including epitaxial growth or, alternatively, alternate epitaxial growth and etching steps. An alternative structure includes stripe-like quantum boxes of triangular cross-section. Further, the quantum boxes may be truncated and further triangular, or quadrilateral, prisms may be formed on the corresponding top surfaces of the respective boxes. A further embodiment employs truncated base portions of triangular prism cross-section and quantum wires of triangular cross-section formed thereon. Covering, clad and electrode interconnection layers are formed on the resulting structures and the main surface of the substrate, with respective electrodes being formed on the electrode interconnection layer and the bottom main surface of the substrate.
Inventors
- 👤 Hiroshi Arimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 17:07
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; B; B82; B82Y; B82Y20/00; B82Y10/00; H01; H01S; H01S5/00; H01S5/30; H01S5/34; H01S5/341; H10D; H10D62/00; H10D62/80; H10D62/81; H10D62/812; H10D62/813; H10D62/814; H10P14/24; H10P14/27; H10P14/271; H10P14/2907; H10P14/2911; H10P14/2926; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3211; H10P14/3242; H10P14/3258; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3414; H10P14/3421; H10P14/3451; H10P14/3466; H01S5/3412; Y; Y10; Y10S; Y10S438/00; Y10S438/962
Claims Analysis
Total Claims: 39
Claim 1
Independent Claim
137 words
A quantum box semiconductor structure comprising: a III-V compound semiconductor substrate having a main surface comprising the (111) B plane; truncated triangular pyramid base portions made of a first III-V compound semiconductor, each having a corresponding triangular top surface of a substantially common size and three (111) A sides, formed on the main surface of said substrate; and triangular pyramid quantum boxes respectively corresponding to and formed on the corresponding triangle top surfaces of said truncated triangular pyramid base portion, each thereof having three (111) A sides lying in corresponding, common planes with the three (111) A sides of the respective truncated triangular pyramid base portions, of a second III-V compound semiconductor having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor.
Claim 2
Dependent Claim
137 words
A quantum box semiconductor structure comprising: a III-V compound semiconductor substrate having a main surface comprising the (111) B plane; truncated triangular pyramid base portions made of a first III-V compound semiconductor, each having a corresponding triangular top surface of a substantially common size and three (111) A sides, formed on the main surface of said substrate; and triangular pyramid quantum boxes respectively corresponding to and formed on the corresponding triangle top surfaces of said truncated triangular pyramid base portion, each thereof having three (111) A sides lying in corresponding, common planes with the three (111) A sides of the respective truncated triangular pyramid base portions, of a second III-V compound semiconductor having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor.
Claim 3
Dependent Claim
210 words
A quantum box semiconductor structure comprising: a III-V compound semiconductor substrate having a main surface comprising the (111) B plane; truncated triangular pyramid base portions made of a first III-V compound semiconductor formed on the main surface of said substrate, each having a corresponding triangular top surface of a substantially common size and three (111) A plane sides and serving as a potential barrier; truncated triangular pyramid quantum boxes formed on the corresponding triangle top surfaces of said truncated triangular pyramids, each thereof having three (111) A plane sides lying in corresponding common planes with the three (111) A sides of the respective pyramid base portions, of a second III-V compound semiconductor having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor; and triangular pyramid top portions respectively corresponding to and formed on the corresponding triangle top surfaces of said truncated triangular pyramid quantum boxes and made of said first III-V compound semiconductor, each thereof having three (111) A sides lying in corresponding, common planes with the respective, common planar three (111) A sides of the respective truncated triangular pyramid quantum boxes and the truncated triangular pyramid base portions and serving as a potential barrier.
Claim 4
Dependent Claim
210 words
A quantum box semiconductor structure comprising: a III-V compound semiconductor substrate having a main surface comprising the (111) B plane; truncated triangular pyramid base portions made of a first III-V compound semiconductor formed on the main surface of said substrate, each having a corresponding triangular top surface of a substantially common size and three (111) A plane sides and serving as a potential barrier; truncated triangular pyramid quantum boxes formed on the corresponding triangle top surfaces of said truncated triangular pyramids, each thereof having three (111) A plane sides lying in corresponding common planes with the three (111) A sides of the respective pyramid base portions, of a second III-V compound semiconductor having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor; and triangular pyramid top portions respectively corresponding to and formed on the corresponding triangle top surfaces of said truncated triangular pyramid quantum boxes and made of said first III-V compound semiconductor, each thereof having three (111) A sides lying in corresponding, common planes with the respective, common planar three (111) A sides of the respective truncated triangular pyramid quantum boxes and the truncated triangular pyramid base portions and serving as a potential barrier.
Claim 5
Independent Claim
198 words
A method of producing a quantum box semiconductor structure comprising the steps of: providing a III-V compound semiconductor substrate having a main surface comprising the (111) B plane; forming an insulating layer on the main surface of the semiconductor substrate and having equilateral triangle openings therein exposing corresponding portions of the main surface of the semiconductor substrate; growing triangular pyramids of a first III-V compound semiconductor each having three corresponding (111) A plane sides, on respective, surface portions of said main surface semiconductor substrate exposed through said equilateral triangle openings; etching triangular pyramid top portions of said triangular pyramids thereby to form truncated triangular pyramid base portions having corresponding equilateral triangular top surfaces; and growing triangular pyramid quantum boxes on the corresponding equilateral triangle top surfaces of respective said truncated triangular pyramid base portions, each triangular pyramid quantum box having three corresponding (111) A plane sides lying in respective common planes with the corresponding three (111) A plane sides of the respective truncated triangular pyramid base portion, of a second III-V compound semiconductor having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor.
Claim 6
Independent Claim
198 words
A method of producing a quantum box semiconductor structure comprising the steps of: providing a III-V compound semiconductor substrate having a main surface comprising the (111) B plane; forming an insulating layer on the main surface of the semiconductor substrate and having equilateral triangle openings therein exposing corresponding portions of the main surface of the semiconductor substrate; growing triangular pyramids of a first III-V compound semiconductor each having three corresponding (111) A plane sides, on respective, surface portions of said main surface semiconductor substrate exposed through said equilateral triangle openings; etching triangular pyramid top portions of said triangular pyramids thereby to form truncated triangular pyramid base portions having corresponding equilateral triangular top surfaces; and growing triangular pyramid quantum boxes on the corresponding equilateral triangle top surfaces of respective said truncated triangular pyramid base portions, each triangular pyramid quantum box having three corresponding (111) A plane sides lying in respective common planes with the corresponding three (111) A plane sides of the respective truncated triangular pyramid base portion, of a second III-V compound semiconductor having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor.
Claim 7
Independent Claim
257 words
A method of producing a quantum box semiconductor structure comprising the steps of: providing a III-V compound semiconductor substrate having a main surface comprising the (111) B plane; forming an insulating layer on the main surface of the semiconductor substrate and having equilateral triangle openings therein exposing corresponding portions of the main surface of the semiconductor substrate; growing triangular pyramids of a first III-V compound semiconductor, each having three corresponding (111) A plane sides, on respective surface portions of said main surface of said semiconductor substrate exposed through said equilateral triangle openings; etching triangular pyramid top portions of said triangular pyramids thereby to form truncated triangular pyramid base portions, each having corresponding, first equilateral triangular top surfaces and serving as a potential barrier; growing truncated triangular pyramid quantum boxes on the corresponding, first equilateral triangle top surfaces of respective said truncated triangular pyramid base portions, each triangular pyramid quantum box having three corresponding (111) A plane sides lying in respective common planes with the corresponding three (111) A plane sides of the respective truncated triangular pyramid base portions and a corresponding, second triangle top surface, of a second III-V compound semiconductor having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor; and growing triangular pyramid portions, each having three (111) plane A sides, made of said first III-V compound semiconductor and serving as a potential barrier, on the corresponding, second equilateral triangle top surfaces of said respective, truncated triangular pyramid quantum boxes.
Claim 8
Independent Claim
257 words
A method of producing a quantum box semiconductor structure comprising the steps of: providing a III-V compound semiconductor substrate having a main surface comprising the (111) B plane; forming an insulating layer on the main surface of the semiconductor substrate and having equilateral triangle openings therein exposing corresponding portions of the main surface of the semiconductor substrate; growing triangular pyramids of a first III-V compound semiconductor, each having three corresponding (111) A plane sides, on respective surface portions of said main surface of said semiconductor substrate exposed through said equilateral triangle openings; etching triangular pyramid top portions of said triangular pyramids thereby to form truncated triangular pyramid base portions, each having corresponding, first equilateral triangular top surfaces and serving as a potential barrier; growing truncated triangular pyramid quantum boxes on the corresponding, first equilateral triangle top surfaces of respective said truncated triangular pyramid base portions, each triangular pyramid quantum box having three corresponding (111) A plane sides lying in respective common planes with the corresponding three (111) A plane sides of the respective truncated triangular pyramid base portions and a corresponding, second triangle top surface, of a second III-V compound semiconductor having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor; and growing triangular pyramid portions, each having three (111) plane A sides, made of said first III-V compound semiconductor and serving as a potential barrier, on the corresponding, second equilateral triangle top surfaces of said respective, truncated triangular pyramid quantum boxes.
Claim 9
Dependent Claim
105 words
A quantum box semiconductor structure comprising: a silicon semiconductor substrate having a main (100) plane; truncated quadrilateral pyramid base portions made of a first silicon semiconductor material, each having four corresponding (111) plane sides and a corresponding, square top surface, formed on said substrate; and quadrilateral pyramid quantum boxes formed on the corresponding square top surfaces of respective said truncated quadrilateral pyramid base portions, each quadrilateral pyramid quantum box having four corresponding (111) plane sides, of a second semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first silicon semiconductor material.
Claim 10
Dependent Claim
105 words
A quantum box semiconductor structure comprising: a silicon semiconductor substrate having a main (100) plane; truncated quadrilateral pyramid base portions made of a first silicon semiconductor material, each having four corresponding (111) plane sides and a corresponding, square top surface, formed on said substrate; and quadrilateral pyramid quantum boxes formed on the corresponding square top surfaces of respective said truncated quadrilateral pyramid base portions, each quadrilateral pyramid quantum box having four corresponding (111) plane sides, of a second semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first silicon semiconductor material.
Claim 11
Dependent Claim
25 words
A quantum box semiconductor structure according to claim 5, wherein said corresponding square top surfaces of said base portions are of a substantially common size.
Claim 12
Dependent Claim
26 words
A quantum box semiconductor structure according to claim 5, wherein said second semiconductor material is selected from the group consisting of germanium and germaniumsilicon compound material.
Claim 13
Dependent Claim
176 words
A quantum box semiconductor structure comprising: a silicon semiconductor substrate having a main gate (100) plane; truncated quadrilateral pyramid base portions made of a first, silicon semiconductor material and formed on said substrate, each having four corresponding (111) plane sides and a corresponding, square top surface and serving as a potential barrier; truncated quadrilateral pyramid quantum boxes formed on the corresponding square top surfaces of respective said truncated quadrilateral pyramid base portions, each truncated quadrilateral pyramid quantum box having four corresponding (111) sides and a corresponding square top surface smaller than the respective, corresponding square top surface of the respective said truncated quadrilateral pyramid base portion, of a second semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first, silicon semiconductor; and quadrilateral pyramid portions of said first, silicon semiconductor material formed on the corresponding square top surfaces of respective, said truncated quadrilateral pyramid quantum boxes, each quadrilateral pyramid portion having four corresponding (111) plane sides and serving as a potential barrier.
Claim 14
Dependent Claim
176 words
A quantum box semiconductor structure comprising: a silicon semiconductor substrate having a main gate (100) plane; truncated quadrilateral pyramid base portions made of a first, silicon semiconductor material and formed on said substrate, each having four corresponding (111) plane sides and a corresponding, square top surface and serving as a potential barrier; truncated quadrilateral pyramid quantum boxes formed on the corresponding square top surfaces of respective said truncated quadrilateral pyramid base portions, each truncated quadrilateral pyramid quantum box having four corresponding (111) sides and a corresponding square top surface smaller than the respective, corresponding square top surface of the respective said truncated quadrilateral pyramid base portion, of a second semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first, silicon semiconductor; and quadrilateral pyramid portions of said first, silicon semiconductor material formed on the corresponding square top surfaces of respective, said truncated quadrilateral pyramid quantum boxes, each quadrilateral pyramid portion having four corresponding (111) plane sides and serving as a potential barrier.
Claim 15
Dependent Claim
26 words
A quantum box semiconductor structure according to claim 8, wherein said corresponding square top surfaces of said base portions are of a substantially common, first size.
Claim 16
Dependent Claim
26 words
A quantum box semiconductor structure according to claim 8, wherein said second semiconductor material is selected from the group consisting of germanium and germaniumsilicon compound material.
Claim 17
Dependent Claim
36 words
A quantum box semiconductor structure according to claim 8, wherein said corresponding square top surfaces of said truncated quadrilateral pyramid quantum boxes are of a substantially common, second size which is smaller than the first size.
Claim 18
Independent Claim
158 words
A method of producing a quantum box semiconductor structure comprising the steps of: forming an insulating layer on a silicon semiconductor substrate having a main surface defined by the (100) plane, the insulating layer having square openings therein through which corresponding portions of the main surface of the substrate are exposed; growing respective quadrilateral pyramids of a first, silicon semiconductor material, each having four (111) plane sides, on the surface portions or said main surface of said substrate exposed through said square openings; etching quadrilateral pyramid top portions of said pyramids to form truncated quadrilateral pyramid base portions having corresponding, square top surfaces; and growing quadrilateral pyramid quantum boxes, each having four (111) A plane sides, of a second semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said silicon semiconductor, on the corresponding square top surfaces of respective, said truncated quadrilateral pyramid base portions.
Claim 19
Independent Claim
158 words
A method of producing a quantum box semiconductor structure comprising the steps of: forming an insulating layer on a silicon semiconductor substrate having a main surface defined by the (100) plane, the insulating layer having square openings therein through which corresponding portions of the main surface of the substrate are exposed; growing respective quadrilateral pyramids of a first, silicon semiconductor material, each having four (111) plane sides, on the surface portions or said main surface of said substrate exposed through said square openings; etching quadrilateral pyramid top portions of said pyramids to form truncated quadrilateral pyramid base portions having corresponding, square top surfaces; and growing quadrilateral pyramid quantum boxes, each having four (111) A plane sides, of a second semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said silicon semiconductor, on the corresponding square top surfaces of respective, said truncated quadrilateral pyramid base portions.
Claim 20
Independent Claim
235 words
A method of producing a quantum box semiconductor structure comprising the steps of: forming an insulating layer on a silicon semiconductor substrate having a main (100) plane, the insulating layer having square openings therein through which corresponding portions of the main surface of the substrate are exposed; growing respective quadrilateral pyramids of a first, silicon semiconductor material, each having four (111) plane sides and a corresponding, first quadrilateral top surface, on the surface portions of said main surface of said substrate exposed through said square openings; etching the quadrilateral pyramid top portions of said pyramids to form truncated quadrilateral pyramid base portions, each having a corresponding quadrilateral top surface and serving as a potential barrier; growing truncated quadrilateral pyramid quantum boxes, each having four corresponding (111) plane sides and a corresponding, second quadrilateral top surface, smaller than the corresponding first quadrilateral top surface of the respective truncated quadrilateral pyramid base portion, of a second semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first, silicon semiconductor, on the corresponding, first quadrilateral top surfaces of respective said truncated quadrilateral pyramid base portions; and growing quadrilateral pyramid top portions of said first, silicon semiconductor material, each having four corresponding (111) plane sides and serving as a potential barrier, on the corresponding, first quadrilateral top surfaces of respective, said truncated quadrilateral pyramid quantum boxes.
Claim 21
Independent Claim
235 words
A method of producing a quantum box semiconductor structure comprising the steps of: forming an insulating layer on a silicon semiconductor substrate having a main (100) plane, the insulating layer having square openings therein through which corresponding portions of the main surface of the substrate are exposed; growing respective quadrilateral pyramids of a first, silicon semiconductor material, each having four (111) plane sides and a corresponding, first quadrilateral top surface, on the surface portions of said main surface of said substrate exposed through said square openings; etching the quadrilateral pyramid top portions of said pyramids to form truncated quadrilateral pyramid base portions, each having a corresponding quadrilateral top surface and serving as a potential barrier; growing truncated quadrilateral pyramid quantum boxes, each having four corresponding (111) plane sides and a corresponding, second quadrilateral top surface, smaller than the corresponding first quadrilateral top surface of the respective truncated quadrilateral pyramid base portion, of a second semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first, silicon semiconductor, on the corresponding, first quadrilateral top surfaces of respective said truncated quadrilateral pyramid base portions; and growing quadrilateral pyramid top portions of said first, silicon semiconductor material, each having four corresponding (111) plane sides and serving as a potential barrier, on the corresponding, first quadrilateral top surfaces of respective, said truncated quadrilateral pyramid quantum boxes.
Claim 22
Dependent Claim
112 words
A quantum wire semiconductor structure comprising: a III-V compound semiconductor substrate having a main surface defined by the (100) plane; truncated triangular prism base portions of a first III-V compound semiconductor material, each having two corresponding (111) A plane sides and a corresponding, truncated top portion, formed on said main surface of said substrate; and triangular prism quantum wires formed on the corresponding striped top surfaces of respective, said base portions, each having two corresponding (111) A plane sides, of a second III-V compound semiconductor material having a narrower energy band gap and a laser electron affinity than said the energy band gap and electron affinity of said first III-V compound semiconductor.
Claim 23
Dependent Claim
112 words
A quantum wire semiconductor structure comprising: a III-V compound semiconductor substrate having a main surface defined by the (100) plane; truncated triangular prism base portions of a first III-V compound semiconductor material, each having two corresponding (111) A plane sides and a corresponding, truncated top portion, formed on said main surface of said substrate; and triangular prism quantum wires formed on the corresponding striped top surfaces of respective, said base portions, each having two corresponding (111) A plane sides, of a second III-V compound semiconductor material having a narrower energy band gap and a laser electron affinity than said the energy band gap and electron affinity of said first III-V compound semiconductor.
Claim 24
Dependent Claim
25 words
A quantum wire semiconductor structure according to claim 14, wherein said corresponding striped top surfaces of said base portions are of a substantially common size.
Claim 25
Dependent Claim
167 words
A quantum wire semiconductor structure comprising: a III-V compound semiconductor substrate having a main surface defined by the (100) plane; truncated triangular prism base portions of a first III-V compound semiconductor formed on said main surface of said substrate, each having two corresponding (111) A plane sides and a corresponding truncated top portion defining a corresponding, first stripe top surface and serving as a potential barrier; truncated triangular prism quantum wires formed on the corresponding stripe top surfaces of respective said base portions, each having two corresponding (111) A plane sides and a corresponding truncated top portion defining a corresponding, second stripe top surface, made of a second III-V compound larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor; and triangular prism top portions of said first III-V compound semiconductor formed on the corresponding striped top surfaces of respective, said truncated triangular prism quantum wires, each having two corresponding (111) A plane sides and serving as a potential barrier.
Claim 26
Dependent Claim
167 words
A quantum wire semiconductor structure comprising: a III-V compound semiconductor substrate having a main surface defined by the (100) plane; truncated triangular prism base portions of a first III-V compound semiconductor formed on said main surface of said substrate, each having two corresponding (111) A plane sides and a corresponding truncated top portion defining a corresponding, first stripe top surface and serving as a potential barrier; truncated triangular prism quantum wires formed on the corresponding stripe top surfaces of respective said base portions, each having two corresponding (111) A plane sides and a corresponding truncated top portion defining a corresponding, second stripe top surface, made of a second III-V compound larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor; and triangular prism top portions of said first III-V compound semiconductor formed on the corresponding striped top surfaces of respective, said truncated triangular prism quantum wires, each having two corresponding (111) A plane sides and serving as a potential barrier.
Claim 27
Dependent Claim
25 words
A quantum wire semiconductor structure according to claim 16, wherein said first striped top surfaces of said base portions are of a substantially common size.
Claim 28
Independent Claim
173 words
A method for producing a quantum wire semiconductor structure comprising the steps of: forming an insulating layer on the main surface of a III-V compound semiconductor substrate, the main surface being defined by the (100) plane and the insulating layer having stripe openings therein exposing corresponding stripe surface portions of the main surface of the substrate; growing triangular prisms of a first III-V compound semiconductor material, each having two corresponding (111) A plane sides; on respective, said stripe surface portions on said substrate exposed through said stripe openings; etching triangular prism top portions of said triangular prisms thereby to form, therefrom, truncated triangular prism base portions having corresponding stripe top surfaces; and growing triangular prism quantum wires, each having two corresponding (111) A plane sides and made of a second III-V compound semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor, on the corresponding stripe top surfaces of respective, said truncated triangular prism base portions.
Claim 29
Independent Claim
173 words
A method for producing a quantum wire semiconductor structure comprising the steps of: forming an insulating layer on the main surface of a III-V compound semiconductor substrate, the main surface being defined by the (100) plane and the insulating layer having stripe openings therein exposing corresponding stripe surface portions of the main surface of the substrate; growing triangular prisms of a first III-V compound semiconductor material, each having two corresponding (111) A plane sides; on respective, said stripe surface portions on said substrate exposed through said stripe openings; etching triangular prism top portions of said triangular prisms thereby to form, therefrom, truncated triangular prism base portions having corresponding stripe top surfaces; and growing triangular prism quantum wires, each having two corresponding (111) A plane sides and made of a second III-V compound semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor, on the corresponding stripe top surfaces of respective, said truncated triangular prism base portions.
Claim 30
Independent Claim
228 words
A method of producing a quantum wire semiconductor structure comprising the steps of: forming an insulating layer on the main surface of a III-V compound semiconductor substrate, the main surface being defined by the (100) plane and the insulating layer having stripe openings therein exposing corresponding stripe surface portions of the main surface of the substrate; growing triangular prisms of a first III-V compound semiconductor material, each having two corresponding (111) A plane sides, on respective, said stripe surface portions of said substrate exposed through said stripe openings; etching triangular prism top portions of said triangular prisms thereby to form, therefrom, truncated triangular prism base portions, each thereof serving as a potential barrier; growing truncated triangular prism quantum wires, each having two corresponding (111) A plane sides and a corresponding truncated top portion and made of a second III-V compound semiconductor having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor, on the corresponding stripe top surfaces of respective, said base portions, each truncated triangular prism quantum wire having a corresponding stripe top surface; growing triangular prism top portions of said first III-V compound semiconductor, each having two corresponding (111) A plane sides and serving as a potential barrier, on the corresponding stripe top surfaces of respective, said truncated triangular prism quantum wires.
Claim 31
Independent Claim
228 words
A method of producing a quantum wire semiconductor structure comprising the steps of: forming an insulating layer on the main surface of a III-V compound semiconductor substrate, the main surface being defined by the (100) plane and the insulating layer having stripe openings therein exposing corresponding stripe surface portions of the main surface of the substrate; growing triangular prisms of a first III-V compound semiconductor material, each having two corresponding (111) A plane sides, on respective, said stripe surface portions of said substrate exposed through said stripe openings; etching triangular prism top portions of said triangular prisms thereby to form, therefrom, truncated triangular prism base portions, each thereof serving as a potential barrier; growing truncated triangular prism quantum wires, each having two corresponding (111) A plane sides and a corresponding truncated top portion and made of a second III-V compound semiconductor having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor, on the corresponding stripe top surfaces of respective, said base portions, each truncated triangular prism quantum wire having a corresponding stripe top surface; growing triangular prism top portions of said first III-V compound semiconductor, each having two corresponding (111) A plane sides and serving as a potential barrier, on the corresponding stripe top surfaces of respective, said truncated triangular prism quantum wires.
Claim 32
Dependent Claim
133 words
A semiconductor quantum box optical element comprising: a III-V compound semiconductor substrate having a main surface defined by the (111) B plane; truncated triangular pyramid base portions of a first III-V compound semiconductor material, each having three corresponding (111) A plane sides and a corresponding triangular top surface, formed on said substrate; triangular pyramid quantum boxes formed on the corresponding triangle top surfaces of respective, said truncated triangular pyramid base portions, each having three corresponding (111) A plane sides, of a second III-V compound semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor; and a covering compound semiconductor layer formed on and covering said triangular pyramid quantum boxes and said main surface of said substrate.
Claim 33
Dependent Claim
133 words
A semiconductor quantum box optical element comprising: a III-V compound semiconductor substrate having a main surface defined by the (111) B plane; truncated triangular pyramid base portions of a first III-V compound semiconductor material, each having three corresponding (111) A plane sides and a corresponding triangular top surface, formed on said substrate; triangular pyramid quantum boxes formed on the corresponding triangle top surfaces of respective, said truncated triangular pyramid base portions, each having three corresponding (111) A plane sides, of a second III-V compound semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor; and a covering compound semiconductor layer formed on and covering said triangular pyramid quantum boxes and said main surface of said substrate.
Claim 34
Dependent Claim
241 words
A semiconductor quantum box laser comprising: a III-V compound semiconductor substrate having a main surface defined by the (111) B plane; truncated triangular pyramid base portions of a first III-V compound semiconductor material, each having three corresponding (111) A plane sides and a corresponding first triangular top surface, formed on said substrate; triangular pyramid quantum boxes formed on the corresponding triangle top surfaces of respective, said truncated triangular pyramid base portions, each having three corresponding (111) A plane sides, of a second III-V compound semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor; a covering compound semiconductor layer formed on said corresponding three (111) A plane sides of each of said triangular pyramid quantum boxes and said main surface of said substrate and of a thickness which is less than the height of said truncated triangular pyramid base portions relative to the main surface of the substrate; a compound semiconductor clad layer formed on said covering semiconductor layer and of a thickness so as to extend from the surface of the covering compound semiconductor layer to a height, relatively to the main surface of the substrate, which is greater than the height of the truncated triangular pyramid base portions; a compound semiconductor cap layer formed on said clad layer; and first and second electrodes formed respectively on said cap layer and said substrate.
Claim 35
Dependent Claim
241 words
A semiconductor quantum box laser comprising: a III-V compound semiconductor substrate having a main surface defined by the (111) B plane; truncated triangular pyramid base portions of a first III-V compound semiconductor material, each having three corresponding (111) A plane sides and a corresponding first triangular top surface, formed on said substrate; triangular pyramid quantum boxes formed on the corresponding triangle top surfaces of respective, said truncated triangular pyramid base portions, each having three corresponding (111) A plane sides, of a second III-V compound semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said first III-V compound semiconductor; a covering compound semiconductor layer formed on said corresponding three (111) A plane sides of each of said triangular pyramid quantum boxes and said main surface of said substrate and of a thickness which is less than the height of said truncated triangular pyramid base portions relative to the main surface of the substrate; a compound semiconductor clad layer formed on said covering semiconductor layer and of a thickness so as to extend from the surface of the covering compound semiconductor layer to a height, relatively to the main surface of the substrate, which is greater than the height of the truncated triangular pyramid base portions; a compound semiconductor cap layer formed on said clad layer; and first and second electrodes formed respectively on said cap layer and said substrate.
Claim 36
Dependent Claim
59 words
A semiconductor quantum box laser according to claim 20, wherein each of said triangular pyramid quantum boxes is truncated and defines a corresponding triangular top surface, further comprising triangular pyramid top portions, each having three corresponding (111) A plane sides, of said first III-V compound semiconductor and formed on the corresponding triangle top surfaces of respective, said quantum boxes.
Claim 37
Dependent Claim
82 words
A semiconductor quantum box laser according to claim 21, wherein the thickness of the covering compound semiconductor layer corresponds to the height of the truncated triangular pyramid base portions relatively to the main surface of the substrate and the thickness of said clad layer is selected such that said clad layer extends from the covering compound semiconductor layer to a height, relatively to the main surface of the substrate, which is greater than the height of said truncated triangular pyramid quantum boxes.
Claim 38
Dependent Claim
125 words
A semiconductor quantum box device comprising: a silicon semiconductor substrate having a main surface defined by the 100) plane; truncated quadrilateral pyramid base portions of a first, silicon semiconductor material, each having four corresponding (111) plane sides and a corresponding, square top surface, formed on said main surfaces of said substrate; quadrilateral pyramid quantum boxes formed on the corresponding square top surfaces of respective, said truncated quadrilateral pyramid base portions, each having four corresponding (111) plane sides, of a second semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said silicon semiconductor; and a covering silicon semiconductor layer formed over and covering said quantum boxes and the main surfaces of said substrate.
Claim 39
Dependent Claim
125 words
A semiconductor quantum box device comprising: a silicon semiconductor substrate having a main surface defined by the 100) plane; truncated quadrilateral pyramid base portions of a first, silicon semiconductor material, each having four corresponding (111) plane sides and a corresponding, square top surface, formed on said main surfaces of said substrate; quadrilateral pyramid quantum boxes formed on the corresponding square top surfaces of respective, said truncated quadrilateral pyramid base portions, each having four corresponding (111) plane sides, of a second semiconductor material having a narrower energy band gap and a larger electron affinity than the energy band gap and electron affinity of said silicon semiconductor; and a covering silicon semiconductor layer formed over and covering said quantum boxes and the main surfaces of said substrate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-16 | 1997-11-15 | 1998-05-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-16 | 2001-11-15 | 2002-05-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-16 | 2005-11-15 | 2006-05-17 | $7700.00 | Window Closed / Lapsed |