US5311560A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Frequency synthesizer
Assignee: NEC Corp
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Filing: 1993-01-11
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Granted: 1994-05-10
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Expires: 2013-01-11
Abstract
Abstract A frequency synthesizer which can effect a high speed frequency hopping operation without causing deterioration in stability in phase and frequency in a phase frequency-locked condition and also in output spurious characteristic is disclosed. An output range controlling circuit clips the output voltage of a phase frequency to voltage converting circuit at a voltage corresponding to an input signal. The phase frequency to voltage converting circuit outputs a voltage corresponding to a pulse width inputted thereto from a phase frequency detector. A low-pass filter removes high frequency components of a signal inputted thereto. A voltage-controlled oscillator outputs a signal having a frequency corresponding to a voltage of a signal having passed through the low-pass filter. The phase frequency detector effects phase frequency detection between a reference signal and a signal obtained by frequency dividing the output of the voltage-controlled oscillator by an arbitrary value by a variable frequency divider.
Inventors
- 👤 Satoshi Tatsumi
- 👤 Sadao Okawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 02:33
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/08; H03L7/10; H03L7/104
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
151 words
A frequency synthesizer, comprising: a voltage controlled oscillator for outputting a signal of a frequency corresponding to a voltage inputted thereto; a variable frequency dividing circuit for dividing the frequency signal from said voltage controlled oscillator at a variable dividing ratio; a phase frequency detector for receiving a reference signal and an output of said variable frequency dividing circuit to effect phase frequency detection; a phase frequency to voltage converting circuit for outputting a voltage in accordance with output signals of said phase frequency detector; a low-pass filter for passing a low frequency component of the output voltage of said phase frequency to voltage converting circuit therethrough to said voltage controlled oscillator; and an output range controlling circuit for clipping the output voltage of said phase frequency to voltage converting circuit to maintain it within a voltage range in accordance with said dividing ratio associated with said variable frequency dividing circuit.
Claim 2
Dependent Claim
151 words
A frequency synthesizer, comprising: a voltage controlled oscillator for outputting a signal of a frequency corresponding to a voltage inputted thereto; a variable frequency dividing circuit for dividing the frequency signal from said voltage controlled oscillator at a variable dividing ratio; a phase frequency detector for receiving a reference signal and an output of said variable frequency dividing circuit to effect phase frequency detection; a phase frequency to voltage converting circuit for outputting a voltage in accordance with output signals of said phase frequency detector; a low-pass filter for passing a low frequency component of the output voltage of said phase frequency to voltage converting circuit therethrough to said voltage controlled oscillator; and an output range controlling circuit for clipping the output voltage of said phase frequency to voltage converting circuit to maintain it within a voltage range in accordance with said dividing ratio associated with said variable frequency dividing circuit.
Claim 3
Dependent Claim
105 words
A frequency synthesizer as claimed in claim 1, wherein said output range controlling circuit includes a data converting circuit for receiving data for controlling the dividing ratio at said variable frequency dividing circuit and outputting a digital signal in accordance with the input signals, a digital to analog converter for converting the digital signal output of said data converting circuit into an analog voltage, and a MOS field effect transistor for receiving the output signal of said digital to analog converter and clipping the output voltage of said phase frequency to voltage converting circuit at the predetermined voltage in accordance with the received output signal.
Claim 4
Dependent Claim
140 words
A frequency synthesizer as claimed in claim 1, wherein said output range controlling circuit includes a data converting circuit for receiving data for controlling the dividing ratio at said variable frequency dividing circuit and outputting a pair of digital signals in accordance with the input signals, a pair of digital to analog converters for individually converting the digital signal outputs of said data converting circuit into analog voltages, and a pair of MOS field effect transistors for individually receiving the output signals of said digital to analog converters and clipping the output voltage of said phase frequency to voltage converting circuit at two different predetermined voltages in accordance with the received output signals so that the output voltage of said phase frequency to voltage converting circuit to be applied to said low-pass filter may be within two different voltage values.
Claim 5
Dependent Claim
103 words
A frequency synthesizer as claimed in claim 1, wherein said output range controlling circuit includes a data converting circuit for receiving data for controlling the dividing ratio at said variable frequency dividing circuit and outputting a digital signal in accordance with the input signals, a digital to analog converter for converting the digital signal output of said data converting circuit into an analog voltage, and a bipolar transistor for receiving the output signal of said digital to analog converter and clipping the output voltage of said phase frequency to voltage converting circuit at the predetermined voltage in accordance with the received output signal.
Claim 6
Dependent Claim
138 words
A frequency synthesizer as claimed in claim 1, wherein said output range controlling circuit includes a data converting circuit for receiving data for controlling the dividing ratio at said variable frequency dividing circuit and outputting a pair of digital signals in accordance with the input signals, a pair of digital to analog converters for individually converting the digital signal outputs of said data converting circuit into analog voltages, and a pair of bipolar transistors for individually receiving the output signals of said digital to analog converters and clipping the output voltage of said phase frequency to voltage converting circuit at two different predetermined voltages in accordance with the received output signals so that the output voltage of said phase frequency to voltage converting circuit to be applied to said low-pass filter may be within two different voltage values.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-09 | 1997-11-08 | 1998-05-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-09 | 2001-11-08 | 2002-05-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-09 | 2005-11-08 | 2006-05-10 | $7700.00 | Window Closed / Lapsed |