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US5310698A
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Process for producing an arsenic-doped smooth polycrystalline silicon layer for very large scale integrated circuits
Assignee: Qimonda AG
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Filing: 1991-12-23
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Granted: 1994-05-10
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Expires: 2011-12-23
Abstract
Abstract In a multistage process for producing a smooth polycrystalline silicon layer, in particular a layer with low arsenic doping, for very large scale integrated circuits, by thermal decomposition of gaseous compounds containing the elements, a doped layer and an undoped silicon layer above the doped layer are deposited directly one after the other in a two-stage process. Initially, a surface-covering arsenic layer being at most a few atoms thick, is deposited as a preliminary lining. Then an undoped amorphous silicon layer is deposited on the arsenic layer at a temperature of less than 580 DEG C. Subsequently, the silicon layer is uniformly doped with the arsenic layer serving as a diffusion source, by temperature treatment. Simultaneously, the amorphous silicon is made into a polycrystalline silicon layer.
Inventors
- 👤 Barbara Wild
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 08:38
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/01; H10D1/045; H10D1/047; H10P; H10P14/00; H10P14/20; H10P14/40; H10P14/416; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10P32/30; H10P32/302
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
93 words
A multistage process for producing a smooth polycrystalline silicon layer for very large scale integrated circuits by thermal decomposition of gaseous compounds, which comprises: a) initially depositing a surface-covering arsenic layer being at most a few atoms thick, as a preliminary lining, b) then depositing an undoped amorphous silicon layer on the arsenic layer at a temperature of less than 580° C., c) subsequently uniformly doping the silicon layer with the arsenic layer serving as a diffusion source, by temperature treatment, and d) simultaneously making the amorphous silicon into a polycrystalline silicon layer.
Claim 2
Dependent Claim
93 words
A multistage process for producing a smooth polycrystalline silicon layer for very large scale integrated circuits by thermal decomposition of gaseous compounds, which comprises: a) initially depositing a surface-covering arsenic layer being at most a few atoms thick, as a preliminary lining, b) then depositing an undoped amorphous silicon layer on the arsenic layer at a temperature of less than 580° C., c) subsequently uniformly doping the silicon layer with the arsenic layer serving as a diffusion source, by temperature treatment, and d) simultaneously making the amorphous silicon into a polycrystalline silicon layer.
Claim 3
Dependent Claim
23 words
The process according to claim 1, which comprises repeating steps a) and b) at least once before carrying out steps c) and d).
Claim 4
Dependent Claim
22 words
The process according to claim 1, which comprises carrying out step a) in a range of substantially from 13 to 20 Pa.
Claim 5
Dependent Claim
22 words
The process according to claim 2, which comprises carrying out step a) in a range of substantially from 13 to 20 Pa.
Claim 6
Dependent Claim
22 words
The process according to claim 1, which comprises carrying out step a) in a range of substantially from 13 to 16 Pa.
Claim 7
Dependent Claim
22 words
The process according to claim 2, which comprises carrying out step a) in a range of substantially from 13 to 16 Pa.
Claim 8
Dependent Claim
27 words
The process according to claim 1, which comprises depositing the layers in each of steps a) and b) at a temperature between approximately 550° and 580° C.
Claim 9
Dependent Claim
27 words
The process according to claim 2, which comprises depositing the layers in each of steps a) and b) at a temperature between approximately 550° and 580° C.
Claim 10
Dependent Claim
18 words
The process according to claim 1, which comprises carrying out steps a) and b) at the same temperature.
Claim 11
Dependent Claim
18 words
The process according to claim 2, which comprises carrying out steps a) and b) at the same temperature.
Claim 12
Dependent Claim
28 words
The process according to claim 1, which comprises adjusting the quantity of deposited arsenic by adjusting the duration of the deposition of the preliminary lining in step a).
Claim 13
Dependent Claim
41 words
The process according to claim 1, which comprises adjusting the thickness of the undoped silicon layer deposited in step b) to produce a polysilicon layer having an arsenic concentration of approximately 10 19 to 10 20 atoms per cm 3 .
Claim 14
Dependent Claim
21 words
The process according to claim 1, which comprises carrying out the deposition in step a) with a 1% arsine-in-silane gas mixture.
Claim 15
Dependent Claim
20 words
The process according to claim 13, which comprises carrying out the deposition in step b) with a silane/argon gas mixture.
Claim 16
Dependent Claim
103 words
A two-stage process for producing a smooth polycrystalline silicon layer with low arsenic doping for very large scale integrated circuits by thermal decomposition of gaseous compounds containing the elements, which comprises: a) initially depositing a doped surface-covering arsenic layer being at most a few atoms thick, as a preliminary lining, b) then immediately depositing an undoped amorphous silicon layer directly on the arsenic layer at a temperature of less than 580° C., c) subsequently uniformly doping the silicon layer with the arsenic layer serving as a diffusion source, by temperature treatment, and d) simultaneously making the amorphous silicon into a polycrystalline silicon layer.
Claim 17
Dependent Claim
103 words
A two-stage process for producing a smooth polycrystalline silicon layer with low arsenic doping for very large scale integrated circuits by thermal decomposition of gaseous compounds containing the elements, which comprises: a) initially depositing a doped surface-covering arsenic layer being at most a few atoms thick, as a preliminary lining, b) then immediately depositing an undoped amorphous silicon layer directly on the arsenic layer at a temperature of less than 580° C., c) subsequently uniformly doping the silicon layer with the arsenic layer serving as a diffusion source, by temperature treatment, and d) simultaneously making the amorphous silicon into a polycrystalline silicon layer.
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