US5286671A
Expired / Lapsed
US
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Fusion bonding technique for use in fabricating semiconductor devices
Assignee: Kulite Semiconductor Products Inc
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Filing: 1993-05-07
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Granted: 1994-02-15
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Expires: 2013-05-07
Abstract
Abstract A method of bonding a first silicon wafer to a second silicon wafer comprises the steps of diffusing a high conductivity pattern into a surface of a first semiconductor wafer, etching a portion of the surface to raise at least a portion of the pattern, providing a second semiconductor wafer having an insulating layer of a silicon compound disposed thereon, contacting the surface of the pattern to the insulating layer, and bonding the first and second semiconductor wafers at an elevated temperature.
Inventors
- 👤 Anthony D. Kurtz
- 👤 Alexander A. Ned
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 10:47
CPC Classifications
H; H10; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1914; Y; Y10; Y10S; Y10S148/00; Y10S148/012
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
82 words
A method of bonding a first silicon wafer to a second silicon wafer comprising the steps of: diffusing a high conductivity pattern into a surface of a first semiconductor wafer; etching a portion of said surface to raise at least a portion of said pattern; providing a second semiconductor wafer having an insulating layer of a silicon compound disposed thereon; contacting the surface of said pattern to said insulating layer; and bonding said first and second semiconductor wafers at an elevated temperature.
Claim 2
Independent Claim
82 words
A method of bonding a first silicon wafer to a second silicon wafer comprising the steps of: diffusing a high conductivity pattern into a surface of a first semiconductor wafer; etching a portion of said surface to raise at least a portion of said pattern; providing a second semiconductor wafer having an insulating layer of a silicon compound disposed thereon; contacting the surface of said pattern to said insulating layer; and bonding said first and second semiconductor wafers at an elevated temperature.
Claim 3
Dependent Claim
22 words
The method according to claim 1, wherein said high conductivity pattern is diffused through a thin layer of an insulating silicon compound.
Claim 4
Dependent Claim
21 words
The method according to claim 2, further comprising the step of stripping said thin layer and re-diffusing said high conductivity pattern.
Claim 5
Dependent Claim
17 words
The method according to claim 3 wherein said stripping step is performed prior to said etching step.
Claim 6
Dependent Claim
34 words
The method according to claim 3, wherein said re-diffusing step is performed by diffusing boron into said first semiconductor wafer, thereby forming a thin layer of B 2 O 3 glass over said pattern.
Claim 7
Dependent Claim
13 words
The method according to claim 1, wherein said pattern comprises a circuit pattern.
Claim 8
Dependent Claim
15 words
The method according to claim 6, wherein said circuit pattern is a piezoresistive bridge pattern.
Claim 9
Dependent Claim
14 words
The method according to claim 7, wherein said pattern is a power circuit pattern.
Claim 10
Dependent Claim
29 words
The method according to claim 6, further including the step of etching a surface of said first wafer so that said circuit pattern projects from said first semiconductor wafer.
Claim 11
Dependent Claim
23 words
The method according to claim 1, wherein said first and second wafers are bonded at said elevated temperature for less than 15 minutes.
Claim 12
Independent Claim
77 words
A method of fabricating a piezoresistive semiconductor structure for use in a transducer comprising the steps of: diffusing a piezoresistive pattern into a surface of a first semiconductor wafer; etching a portion of said surface to raise said piezoresistive pattern; providing a second semiconductor wafer having an insulating layer of a silicon compound disposed thereon; contacting the surface of said pattern to said insulating layer; and bonding said first and second semiconductor wafers at an elevated temperature.
Claim 13
Independent Claim
77 words
A method of fabricating a piezoresistive semiconductor structure for use in a transducer comprising the steps of: diffusing a piezoresistive pattern into a surface of a first semiconductor wafer; etching a portion of said surface to raise said piezoresistive pattern; providing a second semiconductor wafer having an insulating layer of a silicon compound disposed thereon; contacting the surface of said pattern to said insulating layer; and bonding said first and second semiconductor wafers at an elevated temperature.
Claim 14
Dependent Claim
26 words
The method according to claim 11, wherein said piezoresistive pattern is diffused through a thin insulating layer of a silicon compound of said first semiconductor wafer.
Claim 15
Dependent Claim
20 words
The method according to claim 12, further comprising the step of stripping said thin insulating layer and re-diffusing said pattern.
Claim 16
Dependent Claim
17 words
The method according to claim 13 wherein said stripping step is performed prior to said etching step.
Claim 17
Dependent Claim
35 words
The method according to claim 13, wherein said re-diffusing step is performed by diffusing boron into said first semiconductor wafer, thereby forming a thin layer of B 2 O 3 glass over said piezoresistive pattern.
Claim 18
Dependent Claim
20 words
The method according to claim 10 where the elevated temperature is at as low as 900° C. to 1000° C.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1997-02-14 | 1997-08-16 | 1998-02-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-02-14 | 2001-08-16 | 2002-02-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-02-14 | 2005-08-16 | 2006-02-15 | $7700.00 | Window Closed / Lapsed |