US5279992A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of producing a wafer having a curved notch
Assignee: Hitachi Ltd
•
Filing: 1992-03-25
•
Granted: 1994-01-18
•
Expires: 2012-03-25
Abstract
Abstract A wafer having chamfered bent portions in the joint regions between the contour of the wafer and the cut-away portion of the wafer such as an orientation flatness. The chipping of the wafer can be prevented, and in coating the wafer with a photoresist, forming an epitaxially grown layer on the wafer, etc., films having desired characteristics can be provided on the surface of the wafer.
Inventors
- 👤 Hisashi Maejima
- 👤 Hiroshi Nishizuka
- 👤 Susumu Komoriya
- 👤 Etuo Egashira
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 04:21
CPC Classifications
H; H10; H10P; H10P90/00; H10P90/12; H10P90/128; B; B24; B24D; B24D5/00; B24D5/02; C; C30; C30B; C30B29/00; C30B29/02; C30B29/06; C30B33/00; H10D; H10D62/00; H10D62/10; H10D62/117; H10W; H10W46/00; H10W46/201; Y; Y10; Y10S; Y10S438/00; Y10S438/974; Y10S438/978
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
60 words
A wafer process for producing a semiconductor device, comprising the steps of: (a) preparing a wafer having a main surface, a substantially circular contour portion and a curved notch formed in said circular contour portion; (b) forming a photoresist film for a photolithographic process on said surface of the wafer; and (c) forming patterns on said surface of the wafer.
Claim 2
Dependent Claim
60 words
A wafer process for producing a semiconductor device, comprising the steps of: (a) preparing a wafer having a main surface, a substantially circular contour portion and a curved notch formed in said circular contour portion; (b) forming a photoresist film for a photolithographic process on said surface of the wafer; and (c) forming patterns on said surface of the wafer.
Claim 3
Dependent Claim
35 words
A wafer process according to claim 1, further comprising: forming connecting portions each defined between said circular contour and said curved notch, and chamfering said connecting portions in a plane parallel to said main surface.
Claim 4
Dependent Claim
101 words
A wafer process for producing a semiconductor device, comprising the steps of: (a) preparing a wafer having a main surface, a substantially circular contour portion, a curved notch formed in said circular contour portion and connecting portions each joining said circular contour portion and said curved notch, at least one of said connecting portions being chamfered in a plane parallel to said main surface; (b) coating a resist for photolithographic process on said surface of the wafer; (c) positioning said wafer by rotating said wafer in touch with a roller means; and (d) forming patterns on said surface of the wafer.
Claim 5
Dependent Claim
101 words
A wafer process for producing a semiconductor device, comprising the steps of: (a) preparing a wafer having a main surface, a substantially circular contour portion, a curved notch formed in said circular contour portion and connecting portions each joining said circular contour portion and said curved notch, at least one of said connecting portions being chamfered in a plane parallel to said main surface; (b) coating a resist for photolithographic process on said surface of the wafer; (c) positioning said wafer by rotating said wafer in touch with a roller means; and (d) forming patterns on said surface of the wafer.
Claim 6
Dependent Claim
97 words
A wafer process according to claim 3, wherein a chamfered range of each said connecting portions is defined by the points of inscribed circles common to both the circular contour portion and the curved notch, and a radius of each inscribed circle is determined by the following expression: ##EQU9## where r=radius of the inscribed circle, R=radius of the wafer, a=half of a length of an unchamfered portion in a positioning removal portion, b=half of a full length of the positioning removal portion before the chamfering, W=width of the wafer, and B=length of wafer and end face portion.
References Cited (Backward Citations)
GB922150A
Cited
GB975960A
Cited
US3951728A
Cited
JPS5260567A
Cited
JPS5338594A
Cited
US4228937A
Cited
US4344260A
Cited
US4256229A
Cited
JPS56105638A
Cited
US4488930A
Cited
JPS5743410A
Cited
JPS5823430A
Cited
US4783225A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-01-17 | 1997-07-19 | 1998-01-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-01-17 | 2001-07-19 | 2002-01-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-01-17 | 2005-07-19 | 2006-01-18 | $7700.00 | Window Closed / Lapsed |