US5275973A
Expired / Lapsed
US
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Method for forming metallization in an integrated circuit
Assignee: Apple Inc
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Filing: 1993-03-01
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Granted: 1994-01-04
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Expires: 2013-03-01
Abstract
Abstract Metallization having a self-aligned diffusion barrier or seed layer is formed in an integrated circuit. In one embodiment of the invention, a sacrificial material (20) is used to define a seed layer (24). A dielectric layer (26) is then formed and the sacrificial material (20) is subsequently removed to expose the underlying seed layer (24). A conductive layer of material (32), such as copper, is then selectively deposited onto the seed layer (24). Because the diffusion barrier or seed layer is self-aligned the metal to metal spacing in an integrated circuit may be reduced. Therefore, integrated circuits having high device packing densities can be fabricated.
Inventors
- 👤 Avgerinos V. Gelatos
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 09:11
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/074; H10W20/076; H10W20/031; H10W20/056; H10W20/057; Y; Y10; Y10S; Y10S438/00; Y10S438/926; Y10S438/942; Y10S438/945
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
243 words
A method for forming metallization in an integrated circuit comprising the steps of: providing a substrate; forming a first dielectric layer overlying the substrate; forming a conductive via through a portion of the first dielectric layer; forming a first conductive layer overlying the conductive via, wherein the first conductive layer is a metal containing layer; depositing a sacrificial layer of material overlying the first conductive layer; patterning the sacrificial layer to form a patterned portion of the sacrificial layer and to form an exposed portion of the first conductive layer, the pattern portion of the sacrificial layer having a top surface and a sidewall; etching the exposed portion of the first conductive layer to form a remaining portion of the first conductive layer underlying the patterned portion of the sacrificial layer and overlying the conductive via; forming a second dielectric layer adjacent to the sidewall of the patterned portion of the sacrificial layer after the remaining portion of the first conductive layer has been formed and exposing the top surface of the patterned portion of the sacrificial layer, wherein the second dielectric layer is substantially planar with the top surface of the patterned portion of the sacrificial layer removing the patterned portion of the sacrificial layer to expose the remaining portion of the first conductive layer and to form an exposed sidewall portion of the second dielectric layer; and depositing a second conductive layer onto the remaining portion of the first conductive layer.
Claim 2
Independent Claim
243 words
A method for forming metallization in an integrated circuit comprising the steps of: providing a substrate; forming a first dielectric layer overlying the substrate; forming a conductive via through a portion of the first dielectric layer; forming a first conductive layer overlying the conductive via, wherein the first conductive layer is a metal containing layer; depositing a sacrificial layer of material overlying the first conductive layer; patterning the sacrificial layer to form a patterned portion of the sacrificial layer and to form an exposed portion of the first conductive layer, the pattern portion of the sacrificial layer having a top surface and a sidewall; etching the exposed portion of the first conductive layer to form a remaining portion of the first conductive layer underlying the patterned portion of the sacrificial layer and overlying the conductive via; forming a second dielectric layer adjacent to the sidewall of the patterned portion of the sacrificial layer after the remaining portion of the first conductive layer has been formed and exposing the top surface of the patterned portion of the sacrificial layer, wherein the second dielectric layer is substantially planar with the top surface of the patterned portion of the sacrificial layer removing the patterned portion of the sacrificial layer to expose the remaining portion of the first conductive layer and to form an exposed sidewall portion of the second dielectric layer; and depositing a second conductive layer onto the remaining portion of the first conductive layer.
Claim 3
Dependent Claim
24 words
The method of claim 1 wherein the step of depositing the second conductive layer is further characterized as selectively depositing the second conductive layer.
Claim 4
Dependent Claim
20 words
The method of claim 1 wherein the step of depositing the second conductive layer is further characterized as depositing copper.
Claim 5
Dependent Claim
24 words
The method of claim 1 further comprising the step of forming a sidewall spacer adjacent the exposed sidewall portion of the second dielectric layer.
Claim 6
Dependent Claim
37 words
The method of claim 1 wherein the step of forming the first conductive layer comprises forming said first conductive layer of at least one material selected from the group consisting of: titanium nitride, titanium-tungsten, tungsten, and molybdenum.
Claim 7
Dependent Claim
36 words
The method of claim 1, wherein the step of forming the second dielectric layer comprises: forming the second dielectric layer from a material selected from the group consisting of: silicon nitride, boron nitride, and boron oxynitride.
Claim 8
Dependent Claim
26 words
The method of claim 1, wherein the step of depositing the sacrificial layer comprises: depositing a material selected from the group consisting of: photoresist and polyimide.
Claim 9
Independent Claim
215 words
A method for forming metallization in an integrated circuit comprising the steps of: providing a substrate; forming a first dielectric layer overlying the substrate; forming a conductive via through a portion of the first dielectric layer; forming a first conductive layer overlying the conductive via, wherein the first conductive layer is a metal containing layer; depositing a sacrificial layer of material overlying the first conductive layer; patterning the sacrificial layer to form an exposed portion of the first conductive layer and to form a patterned portion of the sacrificial layer, the patterned portion of the sacrificial layer having a top surface; etching the exposed portion of the first conductive layer to form a remaining portion of the first conductive layer underlying the patterned portion of the sacrificial layer and overlying the conductive via; forming a second dielectric layer overlying the substrate and the patterned portion of the sacrificial layer; removing a portion of the second dielectric layer to expose the top surface of the patterned portion of the sacrificial layer; removing the patterned portion of the sacrificial layer to expose the remaining portion of the first conductive layer and to form an exposed sidewall portion of the second dielectric layer; and depositing a second conductive layer onto the remaining portion of the first conductive layer.
Claim 10
Independent Claim
215 words
A method for forming metallization in an integrated circuit comprising the steps of: providing a substrate; forming a first dielectric layer overlying the substrate; forming a conductive via through a portion of the first dielectric layer; forming a first conductive layer overlying the conductive via, wherein the first conductive layer is a metal containing layer; depositing a sacrificial layer of material overlying the first conductive layer; patterning the sacrificial layer to form an exposed portion of the first conductive layer and to form a patterned portion of the sacrificial layer, the patterned portion of the sacrificial layer having a top surface; etching the exposed portion of the first conductive layer to form a remaining portion of the first conductive layer underlying the patterned portion of the sacrificial layer and overlying the conductive via; forming a second dielectric layer overlying the substrate and the patterned portion of the sacrificial layer; removing a portion of the second dielectric layer to expose the top surface of the patterned portion of the sacrificial layer; removing the patterned portion of the sacrificial layer to expose the remaining portion of the first conductive layer and to form an exposed sidewall portion of the second dielectric layer; and depositing a second conductive layer onto the remaining portion of the first conductive layer.
Claim 11
Dependent Claim
24 words
The method of claim 8 wherein the step of depositing the second conductive layer is further characterized as selectively depositing the second conductive layer.
Claim 12
Dependent Claim
20 words
The method of claim 8 wherein the step of depositing the second conductive layer is further characterized as depositing copper.
Claim 13
Dependent Claim
24 words
The method of claim 8 further comprising the step of forming a sidewall spacer adjacent the exposed sidewall portion of the second dielectric layer.
Claim 14
Dependent Claim
37 words
The method of claim 8 wherein the step of forming the first conductive layer comprises forming said first conductive layer of at least one material selected from the group consisting of: titanium nitride, titanium-tungsten, tungsten, and molybdenum.
Claim 15
Dependent Claim
23 words
The method of claim 8 wherein the step of depositing the sacrificial layer of material is further characterized as depositing a dielectric layer.
Claim 16
Dependent Claim
36 words
The method of claim 8, wherein the step of forming the second dielectric layer comprises: forming the second dielectric layer from a material selected from the group consisting of: silicon nitride, boron nitride, and boron oxynitride.
Claim 17
Dependent Claim
26 words
The method of claim 8, wherein the step of depositing the sacrificial layer comprises: depositing a material selected from the group consisting of: photoresist and polyimide.
Claim 18
Independent Claim
233 words
A method for forming metallization in an integrated circuit comprising the steps of: providing a substrate; forming a first dielectric layer overlying the substrate; forming a conductive via through a portion of the first dielectric layer; forming a first conductive layer overlying the conductive via, wherein the first conductive layer is a metal containing layer; depositing a sacrificial layer of material overlying the first conductive layer, wherein the sacrificial layer of material is selected from the group consisting of: photoresist and polyimide; patterning the sacrificial layer of material to form an exposed portion of the first conductive layer and to form a patterned portion of the sacrificial layer, the patterned portion of the sacrificial layer having a top surface; etching the exposed portion of the first conductive layer to form a remaining portion of the first conductive layer underlying the patterned portion of the sacrificial layer and overlying the conductive via; forming a second dielectric layer overlying the substrate and the patterned portion of the sacrificial layer; removing a portion of the second dielectric layer to expose the top surface of the patterned portion of the sacrificial layer; removing the patterned portion of the sacrificial layer to expose the remaining portion of the first conductive layer and to form an exposed sidewall portion of the second dielectric layer; and depositing a second conductive layer onto the remaining portion of the first conductive layer.
Claim 19
Independent Claim
233 words
A method for forming metallization in an integrated circuit comprising the steps of: providing a substrate; forming a first dielectric layer overlying the substrate; forming a conductive via through a portion of the first dielectric layer; forming a first conductive layer overlying the conductive via, wherein the first conductive layer is a metal containing layer; depositing a sacrificial layer of material overlying the first conductive layer, wherein the sacrificial layer of material is selected from the group consisting of: photoresist and polyimide; patterning the sacrificial layer of material to form an exposed portion of the first conductive layer and to form a patterned portion of the sacrificial layer, the patterned portion of the sacrificial layer having a top surface; etching the exposed portion of the first conductive layer to form a remaining portion of the first conductive layer underlying the patterned portion of the sacrificial layer and overlying the conductive via; forming a second dielectric layer overlying the substrate and the patterned portion of the sacrificial layer; removing a portion of the second dielectric layer to expose the top surface of the patterned portion of the sacrificial layer; removing the patterned portion of the sacrificial layer to expose the remaining portion of the first conductive layer and to form an exposed sidewall portion of the second dielectric layer; and depositing a second conductive layer onto the remaining portion of the first conductive layer.
Claim 20
Dependent Claim
24 words
The method of claim 16 wherein the step of depositing the second conductive layer is further characterized as selectively depositing the second conductive layer.
Claim 21
Dependent Claim
20 words
The method of claim 16 wherein the step of depositing the second conductive layer is further characterized as depositing copper.
Claim 22
Dependent Claim
24 words
The method of claim 16 further comprising the step of forming a sidewall spacer adjacent the exposed sidewall portion of the second dielectric layer.
Claim 23
Dependent Claim
37 words
The method of claim 16 wherein the step of forming the first conductive layer comprises forming said first conductive layer of at least one material selected from the group consisting of: titanium nitride, titanium-tungsten, tungsten, and molybdenum.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-01-03 | 1997-07-05 | 1998-01-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-01-03 | 2001-07-05 | 2002-01-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-01-03 | 2005-07-05 | 2006-01-04 | $7700.00 | Window Closed / Lapsed |