Patent US6185582B1 successfully refreshed from Google Patents.
Patent US5274469A successfully refreshed from Google Patents.
US5274469A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sample rate converter circuit for image data
Assignee: Eastman Kodak Co
•
Filing: 1991-12-23
•
Granted: 1993-12-28
•
Expires: 2011-12-23
Abstract
Abstract The present invention is a sample rate converter in which a weighted filtering operation is performed. This operation stores a pixel stream in a random access memory (RAM) 30. During conversion pointers stored in counter 38 and register 40 are used to select the pixels from the RAM which are then multiplied by filter weights and accumulated. A counter 44 and mapping unit 46 select the weight being multiplied. The multiplication is performed by a lookup table read only memory (ROM) 32 that stores the results of the pixel-weight multiplication for all combinations of pixels and weights for each sample rate. An accumulator 33 stores the results of the multiplication until all multiplications have occurred at which point the filtered pixel is output. The output of the lookup table 32 is controlled by the pixel value, the coefficient selected and the table or map selected. The lookup table stores symmetric weights for as many conversion rates as desired. The mapping unit 46 maps a sequential coefficient count to a coefficient identifier which is non-sequential and symmetric allowing the size of ROM 32 to minimized and the number of address lines provided to the ROM 32 to be minimized.
Inventors
- 👤 Jeffrey A. Small
- 👤 John J. Uebelacker
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 14:30
CPC Classifications
G; G06; G06T; G06T3/00; G06T3/40; H; H03; H03H; H03H17/00; H03H17/02; H03H17/06; H03H17/0621
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
183 words
A sample rate converter comprising: storage means including a random access memory for storing input data at a first sample rate, convolution filter means for directly filtering the input data to produce output data at a second sampling rate, wherein said filter means includes; a filter coefficient storage outputting filter coefficients corresponding to the input data and for each sample conversion rate, and a multiplier connected to said storage means and multiplying the input data times the filter coefficients; an accumulator connected to said multiplier and accumulating the coefficient multiplied input data, and multiplication storage means connected to said memory for storing all combinations of pixel values time filter coefficients for each sample conversion rate, and an accumulator connected to said storage means, further comprising a control unit connected to said memory and said filter means, said control unit includes; a multiplexer selecting between memory pointers for said memory; first and second pointer counters connected to said multiplexer; a third pointer counter connected to said multiplication storage; and a control unit connected to said storage means, said filter means and said pointer counters.
Claim 2
Dependent Claim
183 words
A sample rate converter comprising: storage means including a random access memory for storing input data at a first sample rate, convolution filter means for directly filtering the input data to produce output data at a second sampling rate, wherein said filter means includes; a filter coefficient storage outputting filter coefficients corresponding to the input data and for each sample conversion rate, and a multiplier connected to said storage means and multiplying the input data times the filter coefficients; an accumulator connected to said multiplier and accumulating the coefficient multiplied input data, and multiplication storage means connected to said memory for storing all combinations of pixel values time filter coefficients for each sample conversion rate, and an accumulator connected to said storage means, further comprising a control unit connected to said memory and said filter means, said control unit includes; a multiplexer selecting between memory pointers for said memory; first and second pointer counters connected to said multiplexer; a third pointer counter connected to said multiplication storage; and a control unit connected to said storage means, said filter means and said pointer counters.
Claim 3
Dependent Claim
31 words
A converter as recited in claim 1, further comprising mapping means, connected between said third pointer counter and said multiplication storage, for converting a sequential count to a non-sequential coefficient selection.
Claim 4
Dependent Claim
31 words
A converter as recited in claim 2, wherein said mapping means converts a sequential count, a coefficient subset selection and a sample rate conversion map selection into the non-sequential coefficient selection.
Claim 5
Dependent Claim
21 words
A converter as recited in claim 3, wherein said mapping means comprises one of a ROM look-up table and decode logic.
Claim 6
Dependent Claim
45 words
A converter as recited in claim 1, wherein filter coefficients are symmetric and said multiplication storage comprises a memory divided into tables corresponding to sample rate conversions and each table being divided into coefficient sections storing the pixel values times a corresponding symmetric filter coefficient.
Claim 7
Dependent Claim
145 words
A sample rate converter for converting input pixel values input at a first rate to output pixel values produced at a second rate, said converter comprising: a random access memory storing the input data; a multiplexer connected to said random access memory; a first counter connected to said multiplexer and controlling storage of the input pixel values into said random access memory; a register connected to said multiplexer and controlling output of the input pixel values to produce the output pixel values; a read only memory connected to said random access memory and storing pixel values times filter coefficient values; a mapping unit connected to said read only memory and producing a coefficient selection value; a counter connected to said mapping unit and controlling production of the coefficient selection value; and an accumulator connected to said read only memory and producing the output pixel values.
Claim 8
Dependent Claim
145 words
A sample rate converter for converting input pixel values input at a first rate to output pixel values produced at a second rate, said converter comprising: a random access memory storing the input data; a multiplexer connected to said random access memory; a first counter connected to said multiplexer and controlling storage of the input pixel values into said random access memory; a register connected to said multiplexer and controlling output of the input pixel values to produce the output pixel values; a read only memory connected to said random access memory and storing pixel values times filter coefficient values; a mapping unit connected to said read only memory and producing a coefficient selection value; a counter connected to said mapping unit and controlling production of the coefficient selection value; and an accumulator connected to said read only memory and producing the output pixel values.
References Cited (Backward Citations)
US4106053A
Cited
US4536745A
Cited
US4891713A
Cited
US5101369A
Cited
US5119093A
Cited
US5159339A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-12-27 | 1997-06-28 | 1997-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-12-27 | 2001-06-28 | 2001-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-12-27 | 2005-06-28 | 2005-12-28 | $7700.00 | Window Closed / Lapsed |