Patent US5272113A successfully refreshed from Google Patents.
US5272113A
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Method for minimizing stress between semiconductor chips having a coefficient of thermal expansion different from that of a mounting substrate
Assignee: Xerox Corp
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Filing: 1992-11-12
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Granted: 1993-12-21
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Expires: 2012-11-12
Abstract
Abstract Semiconductor chips, such as photosensor arrays in a full-width scanner, are mounted on a substrate to maintain reasonably consistent spacing among chips regardless of temperature conditions during use. After chips are tacked onto the substrate with uncured epoxy, the assembly is brought to a low temperature prior to the heating of the curing step. The technique permits design of the assembly to compensate for differences between the thermal coefficient of expansion of the chips and that of the substrate, while also minimizing mechanical stresses on the chips caused by heating in the course of use.
Inventors
- 👤 Kraig A. Quinn
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 15:34
CPC Classifications
G; G06; G06K; G06K7/00; G06K7/10; G06K7/10544; G06K7/10821; G06K7/10841; H; H10; H10D; H10D62/00; H10D62/10; H10D62/117; H10W; H10W90/00; H10W72/00; H10W72/071; H10W72/073; H10W72/07331; H10W72/07337; H10W72/30; H10W72/351; H10W72/353; H10W72/354
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
91 words
A method for mounting a plurality of semiconductor chips having a first thermal coefficient of expansion on a substrate having a second thermal coefficient of expansion, comprising the steps of: applying the semiconductor chips to a surface of the substrate with a thixotropic epoxy in a substantially liquid state, with each semiconductor chip being in contact with an adjacent semiconductor chip; cooling the substrate to a temperature lower than a preselected temperature corresponding to normal operating temperatures of the semiconductor chips; and heating the substrate and chips to cure the epoxy.
Claim 2
Independent Claim
91 words
A method for mounting a plurality of semiconductor chips having a first thermal coefficient of expansion on a substrate having a second thermal coefficient of expansion, comprising the steps of: applying the semiconductor chips to a surface of the substrate with a thixotropic epoxy in a substantially liquid state, with each semiconductor chip being in contact with an adjacent semiconductor chip; cooling the substrate to a temperature lower than a preselected temperature corresponding to normal operating temperatures of the semiconductor chips; and heating the substrate and chips to cure the epoxy.
Claim 3
Dependent Claim
34 words
A method as in claim 1, further comprising the step of selecting the semiconductor chips and substrate so that the first thermal coefficient of expansion is less than the second thermal coefficient of expansion.
Claim 4
Dependent Claim
28 words
A method as in claim 1, further comprising the step of cooling the semiconductor chips to a second predetermined temperature higher than the first-mentioned temperature of the substrate.
Claim 5
Dependent Claim
26 words
A method as in claim 1, further comprising the step of providing on the semiconductor chips open-ended grooves having the open end disposed adjacent the substrate.
Claim 6
Dependent Claim
20 words
A method as in claim 1, wherein the cooling step cools the substrate to a temperature less than 0° C.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-12-20 | 1997-06-21 | 1997-12-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-12-20 | 2001-06-21 | 2001-12-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-12-20 | 2005-06-21 | 2005-12-21 | $7700.00 | Window Closed / Lapsed |