Multiple address grey level LED printing with binary architectured printhead

Claim 1

A non-impact printing apparatus for recording, the apparatus comprising: a binary architectured printhead including a plural number of recording elements and an equal plural number of respective data registers, each of said registers storing a single data bit to determine whether or not a respective one of said recording elements is enabled for recording during a subline recording period of a portion of a respective grey level pixel; enabling means for enabling recording of each said grey level pixel by enabling said respective one of said recording elements to record said respective pixel during plural sub-line recording periods; data formatting means for organizing image data for transmission to said registers, said formatting means including frame store memory means for storing signals representing a plurality of lines of image pixel data forming a complete image frame of said image pixel data, each said grey level pixel being represented by a signal of plural binary bits, selection means for sequentially selecting said lines of said image pixel data in said frame store memory means to sequentially enable output of a selected one of said lines of said image pixel data from said frame store memory means wherein said image pixel data for two adjacent pixels of said selected ones of said lines of said image pixel data are simultaneously selected and output from said frame store memory means by a controller, first buffer means for storing said selected one of said lines of said image pixel data output from said frame store memory means, look-up table correction memory means for outputting respective corrected multibit pixel printing data that modifies respective image pixel data wherein each of the respective corrected data is a signal of n binary data bits (with n being a number greater than one), counter means for generating a count signal identifying said one of said recording elements, first memory means responsive to said count signal and storing respective signals related to characteristics of said one of said recording elements for outputting a first signal representing a characteristic of said one of said recording elements, means coupling said first buffer means and said first memory means to said correction memory means for inputting said image pixel data and said first signal representing a characteristic of said one of said recording elements as address inputs to said correction memory means to identify a memory location in said correction memory means, latch means for latching said respective corrected multibit data output from said correction memory means, multiplexer means for transmitting one of n data bits of the corrected multibit data stored in said latch means to a respective one of said registers, and said controller including means for controlling said coupling means to repeat n times the input of said image pixel data of each said pixel to said correction memory means, means for controlling said latch means to latch n times the output of the respective corrected multibit data from said correction memory means and means for controlling the multiplexer means to transmit to a respective register a different one of the n data bits for use in recording a respective pixel by said one of said recording elements.