Same-side gated process for encapsulating semiconductor devices

Claim 2

A process for encapsulating a semiconductor device attached to a leadframe with electrical connections between the device and the lead frame and positioned in a mold cavity in a transfer mold press containing a separable two part mold having a transfer pot containing a transfer ram, a plurality of mold cavities, a plurality of runners connecting the mold cavities to the transfer pot and a gate to each mold cavity, located in the same half of each mold cavity as the device, comprising: placing an encapsulating plastic in the transfer pot and forcing the encapsulating plastic from the transfer pot, through the runners and a gate into a mold cavity and allowing the encapsulating plastic to completely fill the mold cavity and harden to encapsulate the device, wherein: the gate through which the encapsulating plastic is injected into the mold cavity containing the device is located in the same half of the mold cavity as the device and is at least 2 mm in width by at least 0.30 mm in height or depth; the velocity of encapsulating plastic moving through the mold is between 2.0 and 4.0 mm/sec.; and the loop height of the electrical connections between the device and the leadframe is less than 12 mils.

Claim 3

The process of claim 1 wherein the velocity of the encapsulating plastic is controlled by controlling the temperature of the lead frame, the mold half, the transfer ram, the transfer pot and the encapsulating plastic and by controlling the pressure and velocity of the transfer ram as it forces the encapsulating plastic from the transfer pot through the runners and gates and into the mold cavities.

Claim 4

The process of claim 2 further comprising: removing the leadframe from the mold after the mold compound hardens and trimming and forming the external leads of the leadframe to produce a same-side gated, encapsulated integrated circuit device.

Claim 5

The process of claim 3 wherein the same-side gated, encapsulating integrated circuit device is selected from the group consisting of: a PDIP, a PQFP, a PLCC an SOIC and a SOJ.

Claim 6

A process for encapsulating an integrated circuit device in a transfer mold press containing a preheated separable two part mold having a transfer pot, a plurality of mold cavities, and a plurality of runners and gates connecting the transfer pot to the mold cavities and containing a transfer ram disposed in the transfer pot, wherein each gate is configured to be in the same mold part as the integrated circuit device, the process comprising: attaching the integrated circuit device to the central portion of a leadframe; making electrical connections, with a loop height of less than 12 mils, between electrical terminals on the integrated circuit device and the leads of the leadframe; preheat leadframe to 188°±15° C.; placing the leadframe in a first half of the mold with the attached device and electrical connections disposed over a mold cavity; securing the second half of the mold over the leadframe; placing a solid thermosetting mold compound in a preheated transfer pot; contacting heated mold compound in the transfer pot with the transfer ram to exert a pressure of between 950 and 1050 pounds per square inch on the heated mold compound and force the compound from the transfer pot through the runners to a gate located on the same side of the mold cavity as the attached device and electrical connections, to thereby inject the mold compound into the mold cavity at a speed of 2 to 4 mm/sec; allowing the mold compound to completely fill the mold cavity and harden to encapsulate the device; wherein the gate has a width of at least 2 mm and a height of at least 0.30 mm.

Claim 7

A process for encapsulating an integrated circuit device in a transfer mold press containing a preheated separable two part mold having a transfer pot, a plurality of mold cavities, and a plurality of runners and gates connecting the transfer pot to the mold cavities and containing a transfer ram disposed in the transfer pot, wherein each gate is configured to be in the same mold part as the integrated circuit device, the process comprising: attaching the integrated circuit device to the central portion of a leadframe; making electrical connections, with a loop height of less than 12 mils, between electrical terminals on the integrated circuit device and the leads of the leadframe; preheat leadframe to 188°±15° C.; placing the leadframe in a first half of the mold with the attached device and electrical connections disposed over a mold cavity; securing the second half of the mold over the leadframe; placing a solid thermosetting mold compound in a preheated transfer pot; contacting heated mold compound in the transfer pot with the transfer ram to exert a pressure of between 950 and 1050 pounds per square inch on the heated mold compound and force the compound from the transfer pot through the runners to a gate located on the same side of the mold cavity as the attached device and electrical connections, to thereby inject the mold compound into the mold cavity at a speed of 2 to 4 mm/sec; allowing the mold compound to completely fill the mold cavity and harden to encapsulate the device; wherein the gate has a width of at least 2 mm and a height of at least 0.30 mm.

Claim 8

The process of claim 5 wherein the mold compound is heated for 3 seconds in the transfer pot.

Claim 9

The process of claim 5 wherein the mold is heated to a temperature of 188° C.

Claim 10

The process of claim 5 further comprising: removing the leadframe from the mold after the mold compound hardens and trimming and forming the external leads of the leadframe to produce a same-side gated, encapsulated integrated circuit device.

Claim 11

The process of claim 8 wherein the same-side gated, encapsulated integrated circuit device is selected from the group consisting of: a PDIP, a PQFP, a PLCC an SOIC and a SOJ.