US5246877A
Expired / Lapsed
US
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Method of manufacturing a semiconductor device having a polycrystalline electrode region
Assignee: Mitsubishi Electric Corp
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Filing: 1991-02-06
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Granted: 1993-09-21
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Expires: 2011-02-06
Abstract
Abstract An electrode region, which is formed in an active region in a semiconductor element forming region isolated by dielectric isolation, for example, comprises a polycrystalline semiconductor layer containing a predetermined conductivity type impurity in high concentration and a diffusion layer of the sam conductivity type formed in a periphery of the polycrystalline semiconductor layer. The polycrystalline semiconductor layer can be easily and correctly increased in impurity concentration and increased in high workability in thickness. Thus the semiconductor device having an electrode region of high concentration in desired thickness can be implemented.
Inventors
- 👤 Yoshiaki Hisamoto
- 👤 Hiroshi Yamaguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 03:13
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/10; H10W20/00; H10W20/01; H10W20/021; Y; Y10; Y10S; Y10S438/00; Y10S438/977
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
206 words
A method of fabricating a semiconductor device, comprising the steps of: forming a plurality of grooves on a first major surface of a semiconductor substrate to define a semiconductor element forming region between each adjacent pair of said grooves; forming a polycrystalline semiconductor layer containing a first conductivity type impurity in said semiconductor element forming region on said first major surface of said semiconductor substrate including said grooves, said polycrystalline semiconductor layer being higher in impurity concentration than said semiconductor substrate; forming a dielectric layer on said polycrystalline semiconductor layer; diffusing said first conductivity type impurity from said polycrystalline semiconductor layer serving as a diffusion source into said semiconductor substrate to form a diffusion layer along said polycrystalline semiconductor layer, said diffusion layer together with said polycrystalline semiconductor layer defining an electrode region; forming a supporting semiconductor layer on said dielectric layer; removing said semiconductor substrate from a second major surface's side to expose a part of said dielectric layer, to thereby isolate said semiconductor substrate as well as said polycrystalline semiconductor layer by said dielectric layer for each of said semiconductor element forming regions; and forming an active layer on said diffusion layer, said active layer together with said electrode region forming a semiconductor element.
Claim 2
Independent Claim
206 words
A method of fabricating a semiconductor device, comprising the steps of: forming a plurality of grooves on a first major surface of a semiconductor substrate to define a semiconductor element forming region between each adjacent pair of said grooves; forming a polycrystalline semiconductor layer containing a first conductivity type impurity in said semiconductor element forming region on said first major surface of said semiconductor substrate including said grooves, said polycrystalline semiconductor layer being higher in impurity concentration than said semiconductor substrate; forming a dielectric layer on said polycrystalline semiconductor layer; diffusing said first conductivity type impurity from said polycrystalline semiconductor layer serving as a diffusion source into said semiconductor substrate to form a diffusion layer along said polycrystalline semiconductor layer, said diffusion layer together with said polycrystalline semiconductor layer defining an electrode region; forming a supporting semiconductor layer on said dielectric layer; removing said semiconductor substrate from a second major surface's side to expose a part of said dielectric layer, to thereby isolate said semiconductor substrate as well as said polycrystalline semiconductor layer by said dielectric layer for each of said semiconductor element forming regions; and forming an active layer on said diffusion layer, said active layer together with said electrode region forming a semiconductor element.
Claim 3
Dependent Claim
30 words
A method of fabricating a semiconductor device in accordance with claim 1, wherein said step of forming a supporting semiconductor layer includes a step of epitaxially growing said supporting layer.
Claim 4
Dependent Claim
31 words
A method of fabricating a semiconductor device in accordance with claim 1, wherein said step of removing includes a step of polishing said semiconductor substrate from said second major surface's side.
Claim 5
Dependent Claim
20 words
A method of fabricating a semiconductor device in accordance with claim 1, wherein said semiconductor element includes a bipolar transistor.
Claim 6
Dependent Claim
21 words
A method of fabricating a semiconductor device in accordance with claim 1, wherein said semiconductor element includes a field effect transistor.
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