Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
240 words
A digital-to-analog conversion apparatus operative according to a system clock signal for converting a digital input into a corresponding analog output, comprising: clock means for generating a system clock signal having a given basic frequency and a relatively short period; dividing means for frequency-dividing the system clock signal to produce a divided clock signal having a frequency one-fourth or less of the basic frequency and a relatively long period; oversampling means for oversampling a digital input containing a sequence of multi-bit data; delta-sigma modulating means operative in synchronization with the system clock signal for effecting delta-sigma modulation of the oversampled digital input to produce a requantized digital signal containing, every short period timed by the system clock signal, a requantized data comprised of a lesser number of bits than the multi-bit data; pulse forming means including first means operative in response to the divided clock signal having the frequency one-fourth or less of the basic frequency during each long period timed by the divided clock signal for effecting a detection of a set of the requantized data occurring during each long period of the detection, and second means operative in response to each detection for effecting pulse modulation of each set of the requantized data to form a pulse signal corresponding to the requantized digital signal according to results of the detection; and filtering means for filtering the pulse signal to produce an analog output corresponding to the digital input.
Claim 2
Dependent Claim
240 words
A digital-to-analog conversion apparatus operative according to a system clock signal for converting a digital input into a corresponding analog output, comprising: clock means for generating a system clock signal having a given basic frequency and a relatively short period; dividing means for frequency-dividing the system clock signal to produce a divided clock signal having a frequency one-fourth or less of the basic frequency and a relatively long period; oversampling means for oversampling a digital input containing a sequence of multi-bit data; delta-sigma modulating means operative in synchronization with the system clock signal for effecting delta-sigma modulation of the oversampled digital input to produce a requantized digital signal containing, every short period timed by the system clock signal, a requantized data comprised of a lesser number of bits than the multi-bit data; pulse forming means including first means operative in response to the divided clock signal having the frequency one-fourth or less of the basic frequency during each long period timed by the divided clock signal for effecting a detection of a set of the requantized data occurring during each long period of the detection, and second means operative in response to each detection for effecting pulse modulation of each set of the requantized data to form a pulse signal corresponding to the requantized digital signal according to results of the detection; and filtering means for filtering the pulse signal to produce an analog output corresponding to the digital input.
Claim 3
Dependent Claim
41 words
A digital-to-analog conversion apparatus according to claim 1; wherein the dividing means comprises a frequency-dividing circuit operative to frequency-divide the system clock signal to produce a divided clock signal substantially free of noise which is leaked back into the clock means.
Claim 4
Dependent Claim
80 words
A digital-to-analog conversion apparatus according to claim 1; wherein the dividing means comprises counter means for repeatedly counting a given number of clock pulses of the system clock signal at a given count cycle, and decoder means for decoding each of counted results of the counter means to produce a divided clock signal having a reduced frequency determined by the count cycle of the counter means and being substantially free of noise which is leaked back into the clock means.
Claim 5
Dependent Claim
71 words
A digital-to-analog conversion apparatus according to claim 1; wherein the first means includes detecting means for detecting a digital value represented by the set of the requantized data in synchronization with the divided clock signal, and the second means includes generating means for generating a pulse signal having a pulse which occurs in synchronization with the divided clock signal and which has a pulse width proportional to the detected digital value.
Claim 6
Dependent Claim
87 words
A digital-to-analog conversion apparatus according to claim 1; wherein the first means includes detecting means operative during each long period for detecting individual data contained in each set of the requantized data, and the second means includes generating means for generating a pulse component according to the detected individual data and adding means for adding the generated pulse components with one another to produce a pulse signal having a composite pulse waveform which occurs during each long period and which represents each set of the requantized data.
Claim 7
Dependent Claim
191 words
A digital to analog converter comprising: means for generating a system clock signal having a given basic frequency and a first period; means for frequency dividing the system clock signal to produce a divided clock signal having a frequency not more than one fourth the given basic frequency and a second period which is longer than the first period; means for oversampling a digital input comprising a sequence of multi-bit data; means operative in synchronism with the system clock signal for effecting delta-sigma modulation of the oversampled digital input to produce a requantized digital signal for every first period of the system clock signal comprising a lesser number of bits than the multi-bit data; means operative in response to the divided clock signal having the frequency not more than one fourth of the given basic frequency during each second period of the divided clock signal for detecting a set of requantized data; means operative in response to each detection for effecting pulse modulation of each set of requantized data to form a pulse signal; and means for filtering the pulse signal to produce an analog output corresponding to the digital input.
Claim 8
Dependent Claim
191 words
A digital to analog converter comprising: means for generating a system clock signal having a given basic frequency and a first period; means for frequency dividing the system clock signal to produce a divided clock signal having a frequency not more than one fourth the given basic frequency and a second period which is longer than the first period; means for oversampling a digital input comprising a sequence of multi-bit data; means operative in synchronism with the system clock signal for effecting delta-sigma modulation of the oversampled digital input to produce a requantized digital signal for every first period of the system clock signal comprising a lesser number of bits than the multi-bit data; means operative in response to the divided clock signal having the frequency not more than one fourth of the given basic frequency during each second period of the divided clock signal for detecting a set of requantized data; means operative in response to each detection for effecting pulse modulation of each set of requantized data to form a pulse signal; and means for filtering the pulse signal to produce an analog output corresponding to the digital input.
Claim 9
Dependent Claim
20 words
A digital to analog converter according to claim 6; wherein the means for frequency dividing comprises a frequency dividing circuit.
Claim 10
Dependent Claim
66 words
A digital to analog converter according to claim 6; wherein the means for frequency dividing comprises counter means for repeatedly counting a given number of clock pulses of the system clock signal at a given count cycle, and decoder means for decoding the count in the counter means to produce the divided clock signal determined by the clock cycle and which is substantially free of noise.
Claim 11
Dependent Claim
61 words
A digital to analog converter according to claim 6; wherein the means for detecting comprises means for detecting a digital value in synchronization with the divided clock signal; and the means for effecting pulse modulation includes means for generating a pulse signal in synchronization with the divided clock signal and which has a pulse width proportional to the detected digital value.
Claim 12
Dependent Claim
85 words
A digital to analog converter according to claim 6; wherein the means for detecting comprises means operative during each second period for detecting individual data contained in each set of the requantized data; and the means for effecting pulse modulation comprises means for generating a pulse component according to the detected individual data, and means for adding the pulse components to produce a pulse signal having a composite pulse waveform and occurring during each second period and which corresponds to each set of requantized data.