Power on reset circuit having operational voltage trip point

Claim 1

A power on reset circuit for an integrated circuit having circuit components requiring a finite operating voltage level for operation and in which power supply voltage ramps up following power supply turn on, said power on reset circuit comprising: a reset signal terminal, logic means having an input terminal and an output terminal and responsive to an input voltage of a first level for generating a power on reset (POR) signal and responsive to an input voltage of a second level higher than said first level for generating a removal of the power on reset (POR) signal, a power supply terminal and a circuit ground terminal, resistive means connecting said circuit ground terminal to said input terminal of said logic means, voltage barrier means connecting said power supply terminal to said input terminal of said logic means, said voltage barrier means being conductive to voltages above a barrier level at approximately said second level, and an output circuit connected to said power supply terminal and representative of a circuit component requiring the finite operating voltage level for operation, said output circuit connecting said output terminal of said logic means to said reset signal terminal, said output circuit providing a signal indicative of said power on reset (POR) signal to said output terminal until said output circuit becomes operational and responds to said removal of the power on reset (POR) signal.