Patent USRE22584E successfully refreshed from Google Patents.
US5136181A
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Power-on-reset circuit
Assignee: Renesas Electronics Corp
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Filing: 1991-09-26
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Granted: 1992-08-04
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Expires: 2011-09-26
Abstract
Abstract A power-on-reset circuit includes first to third first-conductive-type MOSFETs, a second-conductive-type MOSFET, a capacitance, and first to third resistances. In the power-on-reset circuit, whether a reset signal is supplied to an external circuit is determined by threshold voltages of the MOSFETs and independent on the building-up speed of the power supply voltage.
Inventors
- 👤 Akira Yukawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 10:02
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/22; H03K17/223; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/356008
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
209 words
A power-on-reset circuit, comprising: a first first-conductive-type MOSFET connected at a gate to a first node, at a source to a second power supply line, and at a drain to a second node; a second first-conductive-type MOSFET connected at a gate to a third node, at a source to said second power supply line, and at a drain to a fourth node; a third first-conductive-type MOSFET connected at a gate to said fourth node, at a source to said second power supply line, and at a drain to said third node; a second-conductive-type MOSFET connected at a gate to said third node, at a source to a first power supply line, and at a drain to said fourth node; a capacitance connected between said first power supply line and said third node; a first resistance connected between said first power supply line and said first node; a second resistance connected between said first and second nodes; and a third resistance connected between said second and third nodes; wherein said second first-conductive-type MOSFET and said second-conductive-type MOSFET are connected complementarily between said first and second power supply lines to compose an inverter; and a threshold voltage of said second first-conductive-type MOSFET is lower than that of said first first-conductive-type MOSFET.
Claim 2
Dependent Claim
209 words
A power-on-reset circuit, comprising: a first first-conductive-type MOSFET connected at a gate to a first node, at a source to a second power supply line, and at a drain to a second node; a second first-conductive-type MOSFET connected at a gate to a third node, at a source to said second power supply line, and at a drain to a fourth node; a third first-conductive-type MOSFET connected at a gate to said fourth node, at a source to said second power supply line, and at a drain to said third node; a second-conductive-type MOSFET connected at a gate to said third node, at a source to a first power supply line, and at a drain to said fourth node; a capacitance connected between said first power supply line and said third node; a first resistance connected between said first power supply line and said first node; a second resistance connected between said first and second nodes; and a third resistance connected between said second and third nodes; wherein said second first-conductive-type MOSFET and said second-conductive-type MOSFET are connected complementarily between said first and second power supply lines to compose an inverter; and a threshold voltage of said second first-conductive-type MOSFET is lower than that of said first first-conductive-type MOSFET.
Claim 3
Dependent Claim
29 words
A power-on-reset circuit, according to claim 1, further comprising: an inverter connected at an input to said fourth node to generate a reset signal in a semiconductor integrated circuit.
Claim 4
Dependent Claim
17 words
A power-on-reset circuit, according to claim 2, wherein: said semiconductor integrated circuit is a CMOS integrated circuit.
Claim 5
Dependent Claim
33 words
A power-on-reset circuit, according to claim 2, wherein: a voltage of said first power supply of generating said reset signal is adjusted by a ratio of values of said first and second resistances.
Claim 6
Dependent Claim
29 words
A power-on-reset circuit, according to claim 4, wherein: said voltage of said first power supply of generating said reset signal is further adjusted by elements constant of said MOSFETs.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-08-04 | 1996-02-03 | 1996-08-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-08-04 | 2000-02-03 | 2000-08-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-08-04 | 2004-02-03 | 2004-08-04 | $7700.00 | Window Closed / Lapsed |