US5242846A
Expired / Lapsed
US
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Method of manufacturing a junction field effect transistor
Assignee: Mitsubishi Electric Corp
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Filing: 1992-08-11
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Granted: 1993-09-07
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Expires: 2012-08-11
Abstract
Abstract A method of making a junction field effect transistor includes sequentially growing a first conductivity type semiconductor layer and a relatively high resistivity semiconductor layer on a relatively high resistivity semiconductor substrate; forming spaced apart relatively low resistivity first conductivity type source and drain regions in the relatively high resistivity and first conductivity type semiconductor layers; forming a second conductivity type gate region in the high resistivity semiconductor layer spaced from the source and drain regions and extending to and forming a rectifying junction with the first conductivity type semiconductor layer; and forming source, gate, and drain electrodes in contact with the source, gate, and drain regions, respectively.
Inventors
- 👤 Sigekazu Izumi
- 👤 Kohki Nagahara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 23:01
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/83
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
143 words
A method of making a junction field effect transistor comprising: sequentially growing a first conductivity type semiconductor layer and a relatively high resistivity semiconductor layer on a relatively high resistivity semiconductor substrate, leaving a surface of the relatively high resistivity layer exposed; forming spaced apart relatively low resistivity first conductivity type source and drain regions in the relatively high resistivity and first conductivity type semiconductor layers; forming a second conductivity type gate region in the high resistivity semiconductor layer spaced from the source and drain regions and extending to and forming a rectifying junction with the first conductivity type semiconductor layer; and forming spaced apart source, gate, and drain electrodes on the surface in contact with the source, gate, and drain regions, respectively, wherein the gate electrode extends beyond the gate region and contacts the relatively high resistivity semiconductor layer on the surface.
Claim 2
Independent Claim
143 words
A method of making a junction field effect transistor comprising: sequentially growing a first conductivity type semiconductor layer and a relatively high resistivity semiconductor layer on a relatively high resistivity semiconductor substrate, leaving a surface of the relatively high resistivity layer exposed; forming spaced apart relatively low resistivity first conductivity type source and drain regions in the relatively high resistivity and first conductivity type semiconductor layers; forming a second conductivity type gate region in the high resistivity semiconductor layer spaced from the source and drain regions and extending to and forming a rectifying junction with the first conductivity type semiconductor layer; and forming spaced apart source, gate, and drain electrodes on the surface in contact with the source, gate, and drain regions, respectively, wherein the gate electrode extends beyond the gate region and contacts the relatively high resistivity semiconductor layer on the surface.
Claim 3
Dependent Claim
17 words
The method of claim 1 including growing the relatively high resistivity semiconductor layer without intentionally doping it.
Claim 4
Dependent Claim
31 words
The method of claim 1 including growing the first conductivity type semiconductor layer of a first semiconductor material and growing the relatively high resistivity semiconductor layer of a second semiconductor material.
Claim 5
Dependent Claim
27 words
The method of claim 3 including growing aluminum gallium arsenide as the first conductivity type semiconductor layer and gallium arsenide as the relatively high resistivity semiconductor layer.
Claim 6
Dependent Claim
26 words
The method of claim 3 including growing gallium arsenide as the first conductivity type semiconductor layer and gallium arsenide as the relatively high resistivity semiconductor layer.
Claim 7
Dependent Claim
38 words
The method of claim 1 including forming the source and drain regions by implanting impurities that produce the first conductivity type in two spaced apart portions of the first conductivity layer and the relatively high resistivity semiconductor layer.
Claim 8
Dependent Claim
42 words
The method of claim 6 including growing at least one of gallium arsenide and aluminum gallium arsenide as the first conductivity type semiconductor layer and the relatively high resistivity semiconductor layer and implanting silicon ions to form the source and drain regions.
Claim 9
Dependent Claim
31 words
The method of claim 1 including forming the second conductivity type gate region by implanting impurities that produce the second conductivity type in a portion of the high resistivity semiconductor layer.
Claim 10
Dependent Claim
33 words
The method of claim 8 including growing gallium arsenide as the relatively high resistivity layer and implanting magnesium in a portion of the relatively high resistivity semiconductor layer to produce the gate region.
Claim 11
Dependent Claim
33 words
The method of claim 8 including growing gallium arsenide as the relatively high resistivity layer and implanting zinc in a portion of the relatively high resistivity semiconductor layer to produce the gate region.
Claim 12
Dependent Claim
44 words
The method of claim 1 wherein the substrate is relatively high resistivity gallium arsenide including growing a relatively high resistivity buffer layer on the substrate and sequentially growing the first conductivity type semiconductor layer and relatively high resistivity semiconductor layer on the buffer layer.
Claim 13
Dependent Claim
13 words
The method of claim 11 including growing gallium arsenide as the buffer layer.
Claim 14
Dependent Claim
31 words
The method of claim 1 including forming the second conductivity gate region by diffusing impurities that produce the second conductivity type into a portion of the relatively high resistivity semiconductor layer.
Claim 15
Dependent Claim
40 words
The method of claim 1 including forming the source and drain regions by diffusing impurities that produce the first conductivity type into two spaced apart portions of the first conductivity type semiconductor layer and the relatively high resistivity semiconductor layer.
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| 3.5 Years (Year 4) | 1996-09-06 | 1997-03-08 | 1997-09-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-09-06 | 2001-03-08 | 2001-09-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-09-06 | 2005-03-08 | 2005-09-07 | $7700.00 | Window Closed / Lapsed |