Semiconductor device having increased electrostatic breakdown voltage

Claim 2

A semiconductor device comprising: a terminal for external connection; a first circuit comprising at least one insulated-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region; and a second circuit comprising at least one insulated-gate field effect transistor having a gate portion coupled to the terminal, the transistor of the second circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region of that transistor, the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the first circuit being higher than the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit.

Claim 3

The semiconductor device according to claim 1, wherein the impurity diffusion regions have a Lightly Doped Drain structure.

Claim 4

The semiconductor device according to claim 1, wherein the impurity diffusion regions have a double-diffusion structure.

Claim 5

The semiconductor device according to claim 1, wherein the insulated-gate field effect transistor of the first circuit has a channel length greater than that of the insulated-gate field effect transistor of the second circuit.

Claim 6

A semiconductor device comprising: a terminal for external connection; a first circuit comprising at least one insulated-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region; and a second circuit comprising at least one insulated-gate field effect transistor having a gate portion coupled to the terminal, the transistor of the second circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region of that transistor, the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the first circuit being higher than the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit, and the impurity density of the impurity diffusion region of the insulated-gate field effect transistor of the first circuit falling within a range of 3×10 19 cm -3 to 3×10 20 cm -3 .

Claim 7

A semiconductor device comprising: a terminal for external connection; a first circuit comprising at least one insulated-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region; and a second circuit comprising at least one insulated-gate field effect transistor having a gate portion coupled to the terminal, the transistor of the second circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region of that transistor, the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the first circuit being higher than the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit, and the impurity density of the impurity diffusion region of the insulated-gate field effect transistor of the first circuit falling within a range of 3×10 19 cm -3 to 3×10 20 cm -3 .

Claim 8

The semiconductor device according to claim 4, wherein the channel length of the insulated-gate field effect transistor of the first circuit is 1.2 μm or more, 1.5 μm or more, or 1.9 μm or more against 0.8 μm, 1.0 μm, or 1.2 μm for the channel length of the insulated-gate field effect transistor of the second circuit, respectively.

Claim 9

A semiconductor device comprising: a terminal for external connection; a first circuit comprising at least one insulated-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region, the impurity density of the impurity diffusion region of the insulated-gate field effect transistor of the first circuit falling within a range of 3×10 19 cm -3 to 3×10 20 cm -3 ; and a second circuit comprising at least one insulated-gate field effect transistor having a gate portion coupled to the terminal, the transistor of the second circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region of that transistor, the impurity density of the impurity diffusion region of the insulated-gate field effect transistor of the second circuit falling within a range of 3×10 18 cm -3 to 1×10 19 cm -3 .

Claim 10

A semiconductor device comprising: a terminal for external connection; a first circuit comprising at least one insulated-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region, the impurity density of the impurity diffusion region of the insulated-gate field effect transistor of the first circuit falling within a range of 3×10 19 cm -3 to 3×10 20 cm -3 ; and a second circuit comprising at least one insulated-gate field effect transistor having a gate portion coupled to the terminal, the transistor of the second circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region of that transistor, the impurity density of the impurity diffusion region of the insulated-gate field effect transistor of the second circuit falling within a range of 3×10 18 cm -3 to 1×10 19 cm -3 .

Claim 11

A semiconductor device comprising: a terminal for external connection; a first circuit comprising at least one insulted-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including high density diffusion regions having a high impurity density, impurity diffusion regions having a lower impurity density which extend in contact with the high density diffusion regions, respectively, a channel region formed between the impurity diffusion regions, and a gate insulated from the channel regions; and a second circuit comprising at least one insulated-gate field effect transistor, the transistor of the second circuit including high density diffusion regions having a high impurity density, impurity diffusion regions having a lower impurity density which extend in contact with the high density diffusion regions of that transistor, respectively, a channel region formed between the impurity diffusion regions of that transistor, and a gate portion coupled to the terminal and insulated from the channel region of that transistor, the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the first circuit being higher than the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit, and the channel length of the insulated-gate field effect transistor of the first circuit being greater than that of the insulated-gate field effect transistor of the second circuit.

Claim 12

A semiconductor device comprising: a terminal for external connection; a first circuit comprising at least one insulted-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including high density diffusion regions having a high impurity density, impurity diffusion regions having a lower impurity density which extend in contact with the high density diffusion regions, respectively, a channel region formed between the impurity diffusion regions, and a gate insulated from the channel regions; and a second circuit comprising at least one insulated-gate field effect transistor, the transistor of the second circuit including high density diffusion regions having a high impurity density, impurity diffusion regions having a lower impurity density which extend in contact with the high density diffusion regions of that transistor, respectively, a channel region formed between the impurity diffusion regions of that transistor, and a gate portion coupled to the terminal and insulated from the channel region of that transistor, the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the first circuit being higher than the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit, and the channel length of the insulated-gate field effect transistor of the first circuit being greater than that of the insulated-gate field effect transistor of the second circuit.

Claim 13

A semiconductor device comprising: a terminal for external connection; a semiconductor substrate; a first circuit comprising at least one insulated-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including high density diffusion regions having a high impurity density and being formed in the substrate, impurity diffusion regions having a lower impurity density which extend in the substrate in contact with the high density diffusion regions, respectively, a channel region formed between the impurity diffusion regions, and a gate formed above the substrate and insulated from the channel region; and a second circuit comprising at least one insulated-gate field effect transistor, the transistor of the second circuit including high density diffusion regions having a high impurity density and being formed in the substrate, impurity diffusion regions having a lower impurity density and extending in the substrate in contact with the high density diffusion regions of that transistor, respectively, a channel region formed between the impurity diffusion regions of that transistor, and a gate portion coupled to the terminal of that transistor, formed above the substrate, and insulated from the channel region of that transistor, the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the first circuit being higher than the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit, and the channel length of the insulated-gate field effect transistor of the first circuit being greater than that of the insulated-gate field effect transistor of the second circuit.

Claim 14

A semiconductor device comprising: a terminal for external connection; a semiconductor substrate; a first circuit comprising at least one insulated-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including high density diffusion regions having a high impurity density and being formed in the substrate, impurity diffusion regions having a lower impurity density which extend in the substrate in contact with the high density diffusion regions, respectively, a channel region formed between the impurity diffusion regions, and a gate formed above the substrate and insulated from the channel region; and a second circuit comprising at least one insulated-gate field effect transistor, the transistor of the second circuit including high density diffusion regions having a high impurity density and being formed in the substrate, impurity diffusion regions having a lower impurity density and extending in the substrate in contact with the high density diffusion regions of that transistor, respectively, a channel region formed between the impurity diffusion regions of that transistor, and a gate portion coupled to the terminal of that transistor, formed above the substrate, and insulated from the channel region of that transistor, the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the first circuit being higher than the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit, and the channel length of the insulated-gate field effect transistor of the first circuit being greater than that of the insulated-gate field effect transistor of the second circuit.

Claim 15

A semiconductor device comprising: a terminal for external connection; a first circuit comprising at least one insulated-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region; and a second circuit comprising at least one insulated-gate field effect transistor, the transistor of the second circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region of that transistor, the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the first circuit being higher than the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit, and the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit being set in such a manner that an electrostatic breakdown uniformly occurs in a gate width direction.

Claim 16

A semiconductor device comprising: a terminal for external connection; a first circuit comprising at least one insulated-gate field effect transistor having a drain portion coupled to the terminal, the transistor of the first circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region; and a second circuit comprising at least one insulated-gate field effect transistor, the transistor of the second circuit including a high density diffusion region having a high impurity density and an impurity diffusion region having a lower impurity density which extends in contact with the high density diffusion region of that transistor, the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the first circuit being higher than the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit, and the impurity density of the impurity diffusion region in the insulated-gate field effect transistor of the second circuit being set in such a manner that an electrostatic breakdown uniformly occurs in a gate width direction.