US5237658A
Expired / Lapsed
US
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Linear and orthogonal expansion of array storage in multiprocessor computing systems
Assignee: Hewlett Packard Development Co LP
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Filing: 1991-10-01
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Granted: 1993-08-17
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Expires: 2011-10-01
Abstract
Abstract A multiprocessing computer system with data storage array systems allowing for linear and orthogonal expansion of data storage capacity and bandwidth by means of a switching network coupled between the data storage array systems and the multiple processors. The switching network provides the ability for any CPU to be directly coupled to any data storage array. By using the switching network to couple multiple CPU's to multiple data storage array systems, the computer system can be configured to optimally match the I/O bandwidth of the data storage array systems to the I/O performance of the CPU's.
Inventors
- 👤 Mark Walker
- 👤 Albert S. Lui
- 👤 Harald W. Sammer
- 👤 Wing M. Chan
- 👤 William T. Fuller
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 06:14
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/16; G06F15/163; G06F15/173; G06F15/17356; G06F15/17368; G06F15/17375
Claims Analysis
Total Claims: 42
Claim 1
Independent Claim
72 words
A multiprocessing computer system comprising: a. a plurality of processing units; b. at least one data storage array system, each having at least one array controller; c. switching network means, coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system.
Claim 2
Dependent Claim
72 words
A multiprocessing computer system comprising: a. a plurality of processing units; b. at least one data storage array system, each having at least one array controller; c. switching network means, coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system.
Claim 3
Dependent Claim
16 words
The multiprocessing computer system of claim 1, wherein the switching network means comprises a cross-point switch.
Claim 4
Dependent Claim
16 words
The multiprocessing computer system of claim 1, wherein the switching network means comprises a multi-stage switch.
Claim 5
Dependent Claim
241 words
A linearly and orthogonally expandable multiprocessing computer system comprising: a. at least two processing units, each processing unit having a respective input/output data transfer rate; b. at least one interprocessor bus for intercoupling the at least two processing units, the at least one bus having sufficient capacity to be coupled to at least one additional processing unit; c. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be coupled to at least one additional processing unit, each data storage array system having a respective input/output data transfer rate; d. switching network means, coupled to the processing units and to at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system, the switching network means having an input/output data transfer rate; wherein the input/output data transfer rate of the switching network means at least equals the sum of input/output data transfer rates of either the processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the processing units.
Claim 6
Dependent Claim
241 words
A linearly and orthogonally expandable multiprocessing computer system comprising: a. at least two processing units, each processing unit having a respective input/output data transfer rate; b. at least one interprocessor bus for intercoupling the at least two processing units, the at least one bus having sufficient capacity to be coupled to at least one additional processing unit; c. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be coupled to at least one additional processing unit, each data storage array system having a respective input/output data transfer rate; d. switching network means, coupled to the processing units and to at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system, the switching network means having an input/output data transfer rate; wherein the input/output data transfer rate of the switching network means at least equals the sum of input/output data transfer rates of either the processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the processing units.
Claim 7
Dependent Claim
50 words
The multiprocessing computer system of claim 4, further comprising additional data storage units or additional processing units so that the sum of the input/output data transfer rates of the processing units is matched to approximately equal the sum of the input/output data transfer rates of the data storage array systems.
Claim 8
Dependent Claim
16 words
The multiprocessing computer system of claim 4, wherein the switching network means comprises a cross-point switch.
Claim 9
Dependent Claim
16 words
The multiprocessing computer system of claim 4, wherein the switching network means comprises a multi-stage switch.
Claim 10
Dependent Claim
18 words
The multiprocessing computer system of claim 1, wherein the switching network means is coupled to each array controller.
Claim 11
Dependent Claim
16 words
The multiprocessing computer system of claim 8, wherein the switching network means comprises a cross-point switch.
Claim 12
Dependent Claim
16 words
The multiprocessing computer system of claim 8, wherein the switching network means comprises a multi-stage switch.
Claim 13
Dependent Claim
77 words
A multiprocessing computer system comprising: a. a plurality of processing units; b. at least one data storage array system, each having at least one array controller; c. at least two switching network means, each coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a redundant communications link between at least one selected processing unit and at least one data storage array system.
Claim 14
Dependent Claim
77 words
A multiprocessing computer system comprising: a. a plurality of processing units; b. at least one data storage array system, each having at least one array controller; c. at least two switching network means, each coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a redundant communications link between at least one selected processing unit and at least one data storage array system.
Claim 15
Dependent Claim
16 words
The multiprocessing computer system of claim 11, wherein the switching network means comprises a cross-point switch.
Claim 16
Dependent Claim
16 words
The multiprocessing computer system of claim 11, wherein the switching network means comprises a multi-stage switch.
Claim 17
Dependent Claim
74 words
A multiprocessing computer system comprising: a. a plurality of processing units; b. at least one data storage array system, each having at least one array controller; c. at least one switching network, coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system.
Claim 18
Dependent Claim
74 words
A multiprocessing computer system comprising: a. a plurality of processing units; b. at least one data storage array system, each having at least one array controller; c. at least one switching network, coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system.
Claim 19
Dependent Claim
17 words
The multiprocessing computer system of claim 14, wherein at least one switching network comprises a cross-point switch.
Claim 20
Dependent Claim
17 words
The multiprocessing computer system of claim 14, wherein at least one switching network comprises a multi-stage switch.
Claim 21
Dependent Claim
27 words
The multiprocessing computer system of claim 14, wherein at least one switching network is coupled to each array controller of at least one data storage array system.
Claim 22
Dependent Claim
17 words
The multiprocessing computer system of claim 17, wherein at least one switching network comprises a cross-point switch.
Claim 23
Dependent Claim
17 words
The multiprocessing computer system of claim 17, wherein at least one switching network comprises a multi-stage switch.
Claim 24
Dependent Claim
243 words
A linearly and orthogonally expandable multiprocessing computer system comprising: a. at least two processing units, each processing unit having a respective input/output data transfer rate; b. at least one interprocessor bus for intercoupling the at least two processing units, the at least one bus having sufficient capacity to be coupled to at least one additional processing unit; c. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be coupled to at least one additional processing unit, each data storage array system having a respective input/output data transfer rate; d. at least one switching network, coupled to the processing units and to at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system, each switching network having an input/output data transfer rate; wherein the input/output data transfer rate of at least one switching network at least equals the sum of input/output data transfer rates of either the processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the processing units.
Claim 25
Dependent Claim
243 words
A linearly and orthogonally expandable multiprocessing computer system comprising: a. at least two processing units, each processing unit having a respective input/output data transfer rate; b. at least one interprocessor bus for intercoupling the at least two processing units, the at least one bus having sufficient capacity to be coupled to at least one additional processing unit; c. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be coupled to at least one additional processing unit, each data storage array system having a respective input/output data transfer rate; d. at least one switching network, coupled to the processing units and to at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system, each switching network having an input/output data transfer rate; wherein the input/output data transfer rate of at least one switching network at least equals the sum of input/output data transfer rates of either the processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the processing units.
Claim 26
Dependent Claim
50 words
The multiprocessing computer system of claim 20, further comprising additional data storage units or additional processing units so that the sum of the input/output data transfer rates of the processing units is matched to approximately equal the sum of the input/output data transfer rates of the data storage array systems.
Claim 27
Dependent Claim
17 words
The multiprocessing computer system of claim 20, wherein at least one switching network comprises a cross-point switch.
Claim 28
Dependent Claim
17 words
The multiprocessing computer system of claim 20, wherein at least one switching network comprises a multi-stage switch.
Claim 29
Dependent Claim
76 words
A multiprocessing computer system comprising: a. a plurality of processing units; b. at least one data storage array system, each having at least one array controller; c. at least two switching networks, each coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a redundant communications link between at least one selected processing unit and at least one data storage array system.
Claim 30
Dependent Claim
76 words
A multiprocessing computer system comprising: a. a plurality of processing units; b. at least one data storage array system, each having at least one array controller; c. at least two switching networks, each coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a redundant communications link between at least one selected processing unit and at least one data storage array system.
Claim 31
Dependent Claim
17 words
The multiprocessing computer system of claim 24, wherein at least one switching network comprises a cross-point switch.
Claim 32
Dependent Claim
17 words
The multiprocessing computer system of claim 24, wherein at least one switching network comprises a multi-stage switch.
Claim 33
Dependent Claim
88 words
A data storage system for connection to a multiprocessing computer system including a plurality of processing units, the data storage system comprising: a. at least one data storage array system, each having at least one array controller; b. at least one switching network, adapted to be coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system.
Claim 34
Dependent Claim
88 words
A data storage system for connection to a multiprocessing computer system including a plurality of processing units, the data storage system comprising: a. at least one data storage array system, each having at least one array controller; b. at least one switching network, adapted to be coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system.
Claim 35
Dependent Claim
19 words
The data storage system of claim 27, wherein at least one switching network is coupled to each array controller.
Claim 36
Dependent Claim
17 words
The data storage system of claim 27, wherein at least one switching network comprises a cross-point switch.
Claim 37
Dependent Claim
17 words
The data storage system of claim 27, wherein at least one switching network comprises a multi-stage switch.
Claim 38
Dependent Claim
257 words
A linearly and orthogonally expandable data storage system for connection to a multiprocessing computer system comprising at least two processing units, each processing unit having a respective input/output data transfer rate, and at least one interprocessor bus for intercoupling the at least two processing units, the at least one bus having sufficient capacity to be coupled to at least one additional processing unit, the data storage system comprising: a. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be coupled to at least one additional processing unit, each data storage array system having a respective input/output data transfer rate; b. at least one switching network, adapted to be coupled to the processing units and to at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system, the switching network having an input/output data transfer rate; wherein the input/output data transfer rate of at least one switching network at least equals the sum of input/output data transfer rates of either the processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the processing units.
Claim 39
Dependent Claim
257 words
A linearly and orthogonally expandable data storage system for connection to a multiprocessing computer system comprising at least two processing units, each processing unit having a respective input/output data transfer rate, and at least one interprocessor bus for intercoupling the at least two processing units, the at least one bus having sufficient capacity to be coupled to at least one additional processing unit, the data storage system comprising: a. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be coupled to at least one additional processing unit, each data storage array system having a respective input/output data transfer rate; b. at least one switching network, adapted to be coupled to the processing units and to at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system, the switching network having an input/output data transfer rate; wherein the input/output data transfer rate of at least one switching network at least equals the sum of input/output data transfer rates of either the processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the processing units.
Claim 40
Dependent Claim
50 words
The data storage system of claim 31, further comprising additional data storage units of additional processing units so that the sum of the input/output data transfer rates of the processing units is matched to approximately equal the sum of the input/output data transfer rates of the data storage array systems.
Claim 41
Dependent Claim
17 words
The data storage system of claim 31, wherein at least one switching network comprises a cross-point switch.
Claim 42
Dependent Claim
17 words
The data storage system of claim 31, wherein at least one switching network comprises a multi-stage switch.
References Cited (Backward Citations)
US3893178A
Cited
US4092732A
Cited
US4467421A
Cited
US4562576A
Cited
US4849929A
Cited
US4817035A
Cited
US4667326A
Cited
US4754397A
Cited
US4768193A
Cited
US4811210A
Cited
US4722085A
Cited
US4761785A
Cited
US4761785B1
Cited
US4775978A
Cited
US4870643A
Cited
US4899342A
Cited
US4993030A
Cited
US4914656A
Cited
US4989206A
Cited
US4985830A
Cited
US5088081A
Cited
US5134619A
Cited
US5130992A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-08-16 | 1997-02-15 | 1997-08-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-08-16 | 2001-02-15 | 2001-08-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-08-16 | 2005-02-15 | 2005-08-17 | $7700.00 | Window Closed / Lapsed |