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US5229700A Expired / Lapsed US ⏱️ 0.0 years remaining

Calibration of signal feedback through VCO's

Assignee: General Electric Co
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Filing: 1992-04-24
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Granted: 1993-07-20
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Expires: 2012-04-24
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Abstract

Abstract A method and system for calibration of a primary signal processing path without interruption of signal processing utilizes a calibration signal processing path which is periodically used to process a signal concurrently with processing in the primary path. Any difference is compensated by gain adjustment in the primary path. In one form, a plurality of primary paths are sequentially compared with a calibrated path. The calibrated path is periodically checked using a precision reference and any error is corrected before comparison of the primary paths.

Inventors

  • 👤 Thomas D. Stitt
  • 👤 Philip R. Cooke
  • 👤 Ajith K. Kumar

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 06:49
CPC Classifications
H; H02; H02P; H02P27/00; H02P27/04; H02P27/06; H02P23/00; H02P23/0077

Claims Analysis

Total Claims: 23
Claim 1
Independent Claim 199 words
A calibration system for a signal monitoring system wherein a plurality of variable amplitude signals are converted to corresponding variable frequency signals: a plurality of voltage controlled oscillators (VCO) each connected for receiving a respective one of a plurality of variable amplitude signals; a multiplexor having a plurality of input terminals, each of the plurality of variable amplitude signals being coupled to a respective one of the input terminals of the multiplexor; a calibration VCO having an input terminal connected to an output terminal of the multiplexor; a predefined calibration signal coupled to one of the input terminals of said multiplexor; processor means, coupled for receiving variable frequency signals from each of said VCO's, for converting each of the variable frequency signals into system usable signals representative of each of the variable amplitude signals, the processor means further comprising means for selectively switching the variable amplitude signals and the calibration signal to the output terminal of the multiplexor and for comparing a signal from the calibration VCO to a signal from a corresponding one of the plurality of VCO's, the processor means correcting the system variable signals to compensate for any difference with respect to the calibration VCO signal.
Claim 2
Dependent Claim 199 words
A calibration system for a signal monitoring system wherein a plurality of variable amplitude signals are converted to corresponding variable frequency signals: a plurality of voltage controlled oscillators (VCO) each connected for receiving a respective one of a plurality of variable amplitude signals; a multiplexor having a plurality of input terminals, each of the plurality of variable amplitude signals being coupled to a respective one of the input terminals of the multiplexor; a calibration VCO having an input terminal connected to an output terminal of the multiplexor; a predefined calibration signal coupled to one of the input terminals of said multiplexor; processor means, coupled for receiving variable frequency signals from each of said VCO's, for converting each of the variable frequency signals into system usable signals representative of each of the variable amplitude signals, the processor means further comprising means for selectively switching the variable amplitude signals and the calibration signal to the output terminal of the multiplexor and for comparing a signal from the calibration VCO to a signal from a corresponding one of the plurality of VCO's, the processor means correcting the system variable signals to compensate for any difference with respect to the calibration VCO signal.
Claim 3
Dependent Claim 122 words
The system of claim 1 wherein the processor means further comprises: a plurality of counters for counting signal oscillations, each coupled to an output terminal of a respective one of the VCO's; and a data processor, connected for sampling the count of each of the counters, for converting the count to a signal representative of the amplitude of a respective one of the variable amplitude signals, the processor further selectively coupling each of the variable amplitude signals through the calibration VCO for developing a calibration count signal and comparing the calibration count signal to a corresponding count signal from one of the plurality of VCO's for developing an error signal, the processor adjusting the corresponding count signal to minimize the error signal.
Claim 4
Dependent Claim 32 words
The system of claim 1 wherein the processor means further comprises: a plurality of counters for counting signal oscillations, each coupled to an output terminal of a respective one of the VCO's.
Claim 5
Dependent Claim 44 words
The system of claim 3 wherein the processor means further comprises: a data processor, connected for sampling the count of each of the counters, for converting the count to a signal representative of the amplitude of a respective one of the variable amplitude signals.
Claim 6
Dependent Claim 51 words
The system of claim 6 wherein the data processor further selectively couples each of the variable amplitude signals through the calibration VCO for developing a calibration count signal and comparing the calibration count signal to a corresponding count signal from one of the plurality of VCO's for developing an error signal.
Claim 7
Dependent Claim 19 words
The system of claim 5 wherein the data processor adjusts the corresponding count signal to minimize the error signal.
Claim 8
Independent Claim 146 words
A method for calibrating a primary signal processor without interruption of signal processing using a calibration signal processor, the method comprising the steps of: processing a calibration reference signal through the calibration signal processor for developing a calibration signal; comparing the calibration signal to a predetermined calibration signal; determining a multiplier necessary to equate the calibration signal to the predetermined calibration signal; processing a signal substantially simultaneously through both the primary signal processor and the calibration signal processor; multiplying the signal processed through the calibration signal processor by the determined multiplier; comparing the signal obtained by the step of multiplying to the signal processed through the primary signal processor; computing a factor necessary to equate the signal processed through the primary signal processor to the signal obtained by the step of multiplying; and adjusting each signal processed through the primary signal processor by the computed factor.
Claim 9
Independent Claim 146 words
A method for calibrating a primary signal processor without interruption of signal processing using a calibration signal processor, the method comprising the steps of: processing a calibration reference signal through the calibration signal processor for developing a calibration signal; comparing the calibration signal to a predetermined calibration signal; determining a multiplier necessary to equate the calibration signal to the predetermined calibration signal; processing a signal substantially simultaneously through both the primary signal processor and the calibration signal processor; multiplying the signal processed through the calibration signal processor by the determined multiplier; comparing the signal obtained by the step of multiplying to the signal processed through the primary signal processor; computing a factor necessary to equate the signal processed through the primary signal processor to the signal obtained by the step of multiplying; and adjusting each signal processed through the primary signal processor by the computed factor.
Claim 10
Independent Claim 82 words
A method for calibrating a primary signal processor subject to drift, without interruption of signal processing, using a calibrated signal processor, the method comprising the steps of: processing a signal substantially simultaneously through both the primary signal processor and the calibration signal processor to obtain at least two resulting signals; comparing the resulting signals and; if the resulting signals differ, developing a multiplier for equating the resulting signal from the primary signal processor to the resulting signal from the calibration signal processor.
Claim 11
Independent Claim 82 words
A method for calibrating a primary signal processor subject to drift, without interruption of signal processing, using a calibrated signal processor, the method comprising the steps of: processing a signal substantially simultaneously through both the primary signal processor and the calibration signal processor to obtain at least two resulting signals; comparing the resulting signals and; if the resulting signals differ, developing a multiplier for equating the resulting signal from the primary signal processor to the resulting signal from the calibration signal processor.
Claim 12
Dependent Claim 25 words
The method of claim 8 further comprising the step of: multiplying each subsequent signal from the primary signal processor by the multiplier to correct drift.
Claim 13
Independent Claim 221 words
A system for calibration of a signal processor without interruption of signal processing through the processor, the system comprising; first voltage to frequency converter means having an input for receiving an analog signal and an output for producing an oscillating signal having a frequency corresponding to the amplitude of the analog signal; first counter means having an input coupled to the output of the converter means, the counter means providing a digital representation of the frequency of the oscillating signal; second voltage to frequency converter means having an input for receiving an analog signal and an output for producing an oscillating signal having a frequency corresponding to the amplitude of the analog signal; second counter means having an input coupled to the output of the second converter means, the second counter means providing a digital representation of the frequency of the oscillating signal; a precision analog reference signal selectively coupled to the second converter means for calibration thereof; and switch means for selectively coupling the precision reference signal and the analog signal applied to the input of the first converter means to the second converter means whereby the output of the first counter means can be compared to the output of the second counter means for calibration of the signal processor comprising the first converter means and the first counter means.
Claim 14
Independent Claim 221 words
A system for calibration of a signal processor without interruption of signal processing through the processor, the system comprising; first voltage to frequency converter means having an input for receiving an analog signal and an output for producing an oscillating signal having a frequency corresponding to the amplitude of the analog signal; first counter means having an input coupled to the output of the converter means, the counter means providing a digital representation of the frequency of the oscillating signal; second voltage to frequency converter means having an input for receiving an analog signal and an output for producing an oscillating signal having a frequency corresponding to the amplitude of the analog signal; second counter means having an input coupled to the output of the second converter means, the second counter means providing a digital representation of the frequency of the oscillating signal; a precision analog reference signal selectively coupled to the second converter means for calibration thereof; and switch means for selectively coupling the precision reference signal and the analog signal applied to the input of the first converter means to the second converter means whereby the output of the first counter means can be compared to the output of the second counter means for calibration of the signal processor comprising the first converter means and the first counter means.
Claim 15
Dependent Claim 56 words
The system of claim 10 further comprising: a plurality of converter means and a corresponding plurality of counter means, each of the converter means being connected for receiving a respective one of a plurality of analog input signals, said the means including means for selectively coupling each of said plurality of signals to the second converter.
Claim 16
Dependent Claim 34 words
The system of claim 11 further comprising: a microcomputer for comparing a signal processed through a selected one of the plurality of converter means to the same signal processed through the second converter means.
Claim 17
Dependent Claim 32 words
The system of claim 12 wherein the switch means comprises: a multiplexor addressable by the microcomputer for selecting one of the plurality of analog signals for coupling to the second converter means.
Claim 18
Dependent Claim 34 words
The system of claim 12 wherein the microcomputer is connected for supplying drive signals to an electric motor, the plurality of analog signals comprising voltage and current signals indicative of operation of the motor.
Claim 19
Dependent Claim 41 words
The system of claim 10 further comprising: a plurality of voltage to frequency converter means an a corresponding plurality of counter means, each of he converter means being connected for receiving a respective one of a plurality of analog input signals.
Claim 20
Dependent Claim 26 words
The system of claim 15 wherein the switch means further comprises: means for selectively coupling each of the plurality of signals to the second converter means.
Claim 21
Dependent Claim 34 words
The system of claim 16 further comprising: a microcomputer for comparing a signal processed through a selected one of the plurality of converter mans to the same signal processed through the second converter means.
Claim 22
Dependent Claim 32 words
The system of claim 16 wherein the switch means further comprises: a multiplexor addressable by the microcomputer for selecting one of the plurality of analog signals for coupling to the second converter.
Claim 23
Dependent Claim 32 words
The system of claim 16 wherein the microcomputer is connected for supplying drive signals to an electric motor, the plurality of analog signals comprising voltage and current signals indicative of motor operation.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-07-19 1997-01-18 1997-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-07-19 2001-01-18 2001-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-07-19 2005-01-18 2005-07-20 $7700.00 Window Closed / Lapsed

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