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US5220684A Expired / Lapsed US ⏱️ 0.0 years remaining

Channel selecting circuit

Assignee: Toshiba Corp
•
Filing: 1991-01-23
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Granted: 1993-06-15
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Expires: 2011-01-23
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Abstract

Abstract In a channel selecting circuit, there are four dividers. A first divider divides a local oscillating signal from a tuner. A second divider divides a reference output signal from a reference oscillator. A third divider divides the output from the first divider. A fourth divider divides the output from the second divider. A first controller changes the ratio of the frequency division in the first divider so as to obtain a synchronous voltage, which is supplied to the tuner, according to a selected channel. That is, the outputs from the first and the second dividers are compared by a phase comparator. The output of the phase comparator is supplied to the local oscillator of the tuner as the synchronous voltage. After the synchronous voltage becomes stable, a second controller tunes the real frequency of the broadcasting signal of the selected channel by changing the ratio of the frequency division in the first divider according to the output of a detector. This detector detects a difference between a predetermined frequency of an intermediate frequency signal. In this case, first, the outputs from the first and second dividers are compared by the phase comparator. Then, the outputs from the third and fourth dividers are compared by the phase comparator, and the output of the phase comparator is supplied to the tuner as the synchronous voltage.

Inventors

  • 👤 Katsuto Suize

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 13:11
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/44; H03; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/197; H03L7/1972; H03J; H03J5/00; H03J5/02; H03J5/0245; H03J5/0272; H03J5/0281; H03L7/08; H03L7/10

Claims Analysis

Total Claims: 29
Claim 1
Independent Claim 160 words
A frequency synthesizer circuit for use in controlling the frequency of an output of a local oscillator in a tuning circuit, the frequency synthesizer circuit comprising: a controller for generating a control signal; switch means, responsive to the control signal and receiving first and second frequency divided oscillation signals and first and second frequency divided reference signals, for switching between one of the first and second frequency divided oscillation signals and between one of the first and second frequency divided reference signals to output a frequency divided local oscillation signal and a frequency divided reference signal, the first and second frequency divided oscillation signals being generated by dividing the frequency of the output of the local oscillator and the first and second frequency divided reference signals being generated by dividing the frequency of an output of a reference oscillator; and a phase comparator for comparing the phases of the frequency divided local oscillation signal and the frequency divided reference signal.
Claim 2
Dependent Claim 160 words
A frequency synthesizer circuit for use in controlling the frequency of an output of a local oscillator in a tuning circuit, the frequency synthesizer circuit comprising: a controller for generating a control signal; switch means, responsive to the control signal and receiving first and second frequency divided oscillation signals and first and second frequency divided reference signals, for switching between one of the first and second frequency divided oscillation signals and between one of the first and second frequency divided reference signals to output a frequency divided local oscillation signal and a frequency divided reference signal, the first and second frequency divided oscillation signals being generated by dividing the frequency of the output of the local oscillator and the first and second frequency divided reference signals being generated by dividing the frequency of an output of a reference oscillator; and a phase comparator for comparing the phases of the frequency divided local oscillation signal and the frequency divided reference signal.
Claim 3
Dependent Claim 34 words
A frequency synthesizer circuit as claimed in claim 1, further comprising: a first divider for generating the first frequency divided oscillation signal; and a second divider for generating the second frequency divided oscillation signal.
Claim 4
Dependent Claim 22 words
A frequency synthesizer circuit as claimed in claim 2, wherein the first divider is coupled to the output of the local oscillator.
Claim 5
Dependent Claim 456 words
A channel selecting circuit comprising: a tuner for converting a high frequency signal to an intermediate frequency signal by mixing the high frequency signal with a local oscillation signal, said tuner comprising a local oscillator for generating the local oscillation signal; a detector for detecting a difference between a frequency of the intermediate frequency signal and a predetermined frequency to produce a difference signal; a first divider for dividing a signal proportional to the local oscillation signal to produce a first divided oscillation signal; a reference oscillator for outputting a reference oscillation signal; a second divider for dividing the reference oscillation signal from the reference oscillator to produce a first divided reference signal; a third divider for dividing the first divided oscillation signal from the first divider to produce a second divided oscillation signal; a fourth divider for dividing the first divded reference signal from the second divider to produce a second divided reference signal; a first switch, coupled to the first divider and the third divider, having a first position for outputting the first divided oscillation signal and a second position for outputting the second divided oscillation signal for providing either the first or second divided oscillation signal as an output; a second switch, coupled to the second divider and the fourth divider, having a first position for outputting the first divided reference signal and a second position for outputting the second divided reference signal for providing either the first or second divided reference signal as an output; a phase comparator for comparing the phase of the output from the first switch with the phase of the output from the second switch to produce a comparison signal; a supply circuit for supplying the comparison signal from the phase comparator to the tuner as a synchronous voltage for control of the local oscillator; a channel input circuit for inputting a selected channel; a first controller for changing the divisor of the first divider so that the first divided oscillation signal corresponds to the selected channel from the channel input circuit and for controlling said first and second switches to their first positions so as to output the first divided oscillation signal and the first divided reference signal, respectively, to said phase comparator until the synchronous voltage from the supply circuit becomes stable; and a second controller for changing the divisor of the first divider according to the difference signal of the detector after the synchronous voltage becomes stable and for controlling the first and second switches to their second positions so as to output the second divided oscillation signal and the second divided reference signal to said phase comparator, thereby tuning the local oscillator to the frequency of an intermediate frequency signal of the selected channel.
Claim 6
Dependent Claim 456 words
A channel selecting circuit comprising: a tuner for converting a high frequency signal to an intermediate frequency signal by mixing the high frequency signal with a local oscillation signal, said tuner comprising a local oscillator for generating the local oscillation signal; a detector for detecting a difference between a frequency of the intermediate frequency signal and a predetermined frequency to produce a difference signal; a first divider for dividing a signal proportional to the local oscillation signal to produce a first divided oscillation signal; a reference oscillator for outputting a reference oscillation signal; a second divider for dividing the reference oscillation signal from the reference oscillator to produce a first divided reference signal; a third divider for dividing the first divided oscillation signal from the first divider to produce a second divided oscillation signal; a fourth divider for dividing the first divded reference signal from the second divider to produce a second divided reference signal; a first switch, coupled to the first divider and the third divider, having a first position for outputting the first divided oscillation signal and a second position for outputting the second divided oscillation signal for providing either the first or second divided oscillation signal as an output; a second switch, coupled to the second divider and the fourth divider, having a first position for outputting the first divided reference signal and a second position for outputting the second divided reference signal for providing either the first or second divided reference signal as an output; a phase comparator for comparing the phase of the output from the first switch with the phase of the output from the second switch to produce a comparison signal; a supply circuit for supplying the comparison signal from the phase comparator to the tuner as a synchronous voltage for control of the local oscillator; a channel input circuit for inputting a selected channel; a first controller for changing the divisor of the first divider so that the first divided oscillation signal corresponds to the selected channel from the channel input circuit and for controlling said first and second switches to their first positions so as to output the first divided oscillation signal and the first divided reference signal, respectively, to said phase comparator until the synchronous voltage from the supply circuit becomes stable; and a second controller for changing the divisor of the first divider according to the difference signal of the detector after the synchronous voltage becomes stable and for controlling the first and second switches to their second positions so as to output the second divided oscillation signal and the second divided reference signal to said phase comparator, thereby tuning the local oscillator to the frequency of an intermediate frequency signal of the selected channel.
Claim 7
Dependent Claim 24 words
A channel selecting circuit claimed in claim 4, wherein the supply circuit comprises a filter circuit for smoothing the output from the phase comparator.
Claim 8
Dependent Claim 17 words
A channel selecting circuit claimed in claim 4, wherein each of the dividers comprises of a counter.
Claim 9
Dependent Claim 17 words
A channel selecting circuit claimed in claim 4, wherein the first and second controllers comprise a microprocessor.
Claim 10
Independent Claim 99 words
A method of controlling the frequency of a local oscillator of a tuning circuit comprising the steps of: dividing the frequency of an output of the local oscillator to produce a first and a second frequency divided oscillator signal; dividing the frequency of an output of a reference oscillator to produce a first and a second frequency divided reference signal; switching either the or the second frequency divided oscillator signals and either the first or the second frequency divided reference signals to a phase comparator in response to a control signal; and comparing the phases of the switched signals.
Claim 11
Independent Claim 99 words
A method of controlling the frequency of a local oscillator of a tuning circuit comprising the steps of: dividing the frequency of an output of the local oscillator to produce a first and a second frequency divided oscillator signal; dividing the frequency of an output of a reference oscillator to produce a first and a second frequency divided reference signal; switching either the or the second frequency divided oscillator signals and either the first or the second frequency divided reference signals to a phase comparator in response to a control signal; and comparing the phases of the switched signals.
Claim 12
Dependent Claim 60 words
A method of controlling the frequency of a local oscillator of a tuning circuit as claimed in claim 8, further comprising the step of switching the other one of the first and second frequency divided oscillator signals and the other one of the first second frequency divided reference signals to the phase comparator upon the occurrence of a predetermined event.
Claim 13
Dependent Claim 178 words
A control circuit for controlling a frequency of a local oscillator signal comprising: a controller for generating first and second control signals; a frequency divider circuit, receiving the local oscillator signal, for dividing the frequency of the local oscillator signal by a factor determined from the first control signal to produce a first oscillation signal and for generating a second oscillation signal, the frequency of the second oscillation signal being a multiple of the frequency of the first oscillation signal; a reference oscillation generating circuit for generating first and second reference oscillation signals, the frequency of the second reference oscillation signal being a multiple of the frequency of the first reference oscillation signal; a switching circuit, coupled to said frequency divider circuit and said reference oscillation generating circuit, for outputting either the first oscillation signal and the first reference oscillation signal or the second oscillation signal and the second reference oscillation signal in response to the second control signal; and a phase comparator, receiving the output of said switching circuit, for outputting a local oscillator frequency control signal.
Claim 14
Dependent Claim 178 words
A control circuit for controlling a frequency of a local oscillator signal comprising: a controller for generating first and second control signals; a frequency divider circuit, receiving the local oscillator signal, for dividing the frequency of the local oscillator signal by a factor determined from the first control signal to produce a first oscillation signal and for generating a second oscillation signal, the frequency of the second oscillation signal being a multiple of the frequency of the first oscillation signal; a reference oscillation generating circuit for generating first and second reference oscillation signals, the frequency of the second reference oscillation signal being a multiple of the frequency of the first reference oscillation signal; a switching circuit, coupled to said frequency divider circuit and said reference oscillation generating circuit, for outputting either the first oscillation signal and the first reference oscillation signal or the second oscillation signal and the second reference oscillation signal in response to the second control signal; and a phase comparator, receiving the output of said switching circuit, for outputting a local oscillator frequency control signal.
Claim 15
Dependent Claim 53 words
A control circuit for controlling a frequency of a local oscillator signal according to claim 10, wherein said frequency divider circuit comprises a first divider, responsive to the first control signal, for producing the first oscillation signal, and a second divider for dividing the first oscillation signal to generate the second oscillation signal.
Claim 16
Dependent Claim 67 words
A control circuit for controlling a frequency of a local oscillator signal according to claim 11, wherein said reference oscillation generating circuit comprises a reference oscillator for generating a reference signal, a first divider for dividing the frequency of the reference signal to generate the first reference oscillation signal, and a second divider for dividing the first reference oscillation signal to generate the second reference oscillation signal.
Claim 17
Dependent Claim 67 words
A control circuit for controlling a frequency of a local oscillator signal according to claim 10, wherein said reference oscillation generating circuit comprises a reference oscillator for generating a reference signal, a first divider for dividing the frequency of the reference signal to generate the first reference oscillation signal, and a second divider for dividing the first reference oscillation signal to generate the second reference oscillation signal.
Claim 18
Dependent Claim 253 words
A channel selecting circuit comprising: a tuner for generating an intermediate frequency signal from a channel of a broadband signal, said tuner comprising a local oscillator for generating a local oscillator signal; a detector circuit for detecting the difference between a frequency of the intermediate frequency signal and a predetermined frequency signal to produce a difference signal; a frequency divider circuit for dividing a frequency of the local oscillator signal by a divisor determined from a first control signal to produce a first oscillation signal and for generating a second oscillation signal, a frequency of the second oscillation signal being proportional to a frequency of the first oscillation signal; a reference oscillation generating circuit for generating first and second reference oscillation signals, a frequency of the second reference oscillation signal being proportional to a frequency of the first reference oscillation signal; a switching circuit, coupled to said frequency divider circuit and said reference oscillation generating circuit, for outputting either the first oscillation signal and the first reference oscillation signal or the second oscillation signal and the second reference oscillation signal in response to a second control signal; means for generating a local oscillator frequency control signal from the output of said switching circuit; a channel selection input circuit for selecting a particular channel of the broadband signal; and a controller for generating the first control signal for controlling said frequency divider circuit and the second control signal for controlling said switching circuit in accordance with the difference signal and the particular channel selected.
Claim 19
Dependent Claim 253 words
A channel selecting circuit comprising: a tuner for generating an intermediate frequency signal from a channel of a broadband signal, said tuner comprising a local oscillator for generating a local oscillator signal; a detector circuit for detecting the difference between a frequency of the intermediate frequency signal and a predetermined frequency signal to produce a difference signal; a frequency divider circuit for dividing a frequency of the local oscillator signal by a divisor determined from a first control signal to produce a first oscillation signal and for generating a second oscillation signal, a frequency of the second oscillation signal being proportional to a frequency of the first oscillation signal; a reference oscillation generating circuit for generating first and second reference oscillation signals, a frequency of the second reference oscillation signal being proportional to a frequency of the first reference oscillation signal; a switching circuit, coupled to said frequency divider circuit and said reference oscillation generating circuit, for outputting either the first oscillation signal and the first reference oscillation signal or the second oscillation signal and the second reference oscillation signal in response to a second control signal; means for generating a local oscillator frequency control signal from the output of said switching circuit; a channel selection input circuit for selecting a particular channel of the broadband signal; and a controller for generating the first control signal for controlling said frequency divider circuit and the second control signal for controlling said switching circuit in accordance with the difference signal and the particular channel selected.
Claim 20
Dependent Claim 45 words
A channel selecting circuit according to claim 14, wherein said frequency divider circuit comprises a first divider, responsive to the first control signal, for producing the first oscillation signal, and a second divider for dividing the first oscillation signal to generate the second oscillation signal.
Claim 21
Dependent Claim 59 words
A channel selecting circuit according to claim 15, wherein said reference oscillation generating circuit comprises a reference oscillator for generating a reference signal, a first divider for dividing the frequency of the reference signal to generate the first reference oscillation signal, and a second divider for dividing the first reference oscillation signal to generate the second reference oscillation signal.
Claim 22
Dependent Claim 66 words
A channel selecting circuit according to claim 16, wherein said controller comprises means, responsive to said particular channel selected, for generating the first control signal for controlling the first divider to divide the frequency of the local oscillator by a first divisor and for generating the second control signal for controlling the switching circuit to output the first oscillation signal and the first reference oscillation signal.
Claim 23
Dependent Claim 81 words
A channel selecting circuit according to claim 17, wherein said controller further comprises means, responsive to the difference signal produced by said detector circuit, for generating the first control signal for controlling the first divider to divide the frequency of the local oscillator by a second divisor after the local oscillator frequency control signal has become stable and for generating the second control signal for controlling the switching circuit to output the first oscillation signal and the first reference oscillation signal.
Claim 24
Dependent Claim 47 words
A channel selecting circuit according to claim 18, wherein said controller further comprises means, responsive to the difference signal produced by said detector circuit, for generating the second control signal for controlling the switching circuit to output the second oscillation signal and the second reference oscillation signal.
Claim 25
Dependent Claim 18 words
A channel selecting circuit according to claim 19, wherein said detector circuit comprises an automatic fine tuning detector.
Claim 26
Dependent Claim 59 words
A channel selecting circuit according to claim 14, wherein said reference oscillation generating circuit comprises a reference oscillator for generating a reference signal, a first divider for dividing the frequency of the reference signal to generate the first reference oscillation signal, and a second divider for dividing the first reference oscillation signal to generate the second reference oscillation signal.
Claim 27
Dependent Claim 66 words
A channel selecting circuit according to claim 14, wherein said controller comprises means, responsive to said particular channel selected, for generating the first control signal for controlling the first divider to divide the frequency of the local oscillator by a first divisor and for generating the second control signal for controlling the switching circuit to output the first oscillation signal and the first reference oscillation signal.
Claim 28
Dependent Claim 81 words
A channel selecting circuit according to claim 22, wherein said controller further comprises means, responsive to the difference signal produced by said detector circuit, for generating the first control signal for controlling the first divider to divide the frequency of the local oscillator by a second divisor after the local oscillator frequency control signal has become stable and for generating the second control signal for controlling the switching circuit to output the first oscillation signal and the first reference oscillation signal.
Claim 29
Dependent Claim 47 words
A channel selecting circuit according to claim 23, wherein said controller further comprises means, responsive to the difference signal produced by said detector circuit, for generating the second control signal for controlling the switching circuit to output the second oscillation signal and the second reference oscillation signal.

References Cited (Backward Citations)

FR2128056A1 Cited
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US4316151A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-06-14 1996-12-14 1997-06-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-06-14 2000-12-14 2001-06-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-06-14 2004-12-14 2005-06-15 $7700.00 Window Closed / Lapsed

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