Patent US5220207A successfully refreshed from Google Patents.
US5220207A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Load current monitor for MOS driver
Assignee: Allegro Microsystems LLC
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Filing: 1991-09-03
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Granted: 1993-06-15
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Expires: 2011-09-03
Abstract
Abstract An integrated circuit chip includes a MOS driver transistor and a relatively small MOS current-monitor transistor having their sources connected to a circuit ground point and their gates connected together to a control-voltage conductor. Current through the monitor transistor flows to a DC voltage supply conductor through a field effect transistor. A differential amplifier has one input connected to the drain of the driver transistor and the other input connected to the drain of the monitor transistor. The output of the differential amplifier is connected to the gate of the field effect transistor to force the drain voltage of the monitor transistor to be equal to the drain voltage of the driver transistor. The current flowing through the small monitor transistor has a constant proportionality with the load current even as the load current approaches zero. With the addition of a differential voltage amplifier having an output connected to the control-voltage conductor, having one input connected to a circuit ground point, and the other input connected to a control-current input pad, the current from the monitor transistor is fedback via a current mirror circuit to the other input of the voltage amplifier, so that the entire circuit can be made to perform as a current amplifier, e.g. driver-load-current/input-control current. By connecting one end of an external precision resistor to the control-current-input pad of the chip and applying a control voltage to the opposite end of the precision resistor, a control current proportional to the control voltage is caused to flow through the control-circuit-input pad. The combination performs as a current amplifier.
Inventors
- 👤 Thomas J. Kovalcik
- 👤 II Paul W. Latham
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 23:21
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/561; H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; H03F3/345; H03K; H03K17/00; H03K17/08; H03K17/082; H03K17/0822
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
103 words
A load-current monitor circuit for a MOS driver transistor comprising a MOS driver transistor and a substantially smaller MOS monitor transistor, said MOS transistors having been simultaneously formed, and having the same channel-polarity and essentially the same threshold voltage, said MOS transistors having their gates connected together and having their sources connected together; and a voltage-forcing circuit means having an input connected to the drain of said MOS driver transistor and having an output connected to the drain of said MOS monitor transistor, for forcing the drain voltage of said monitor transistor to be equal to the drain voltage of said driver transistor.
Claim 2
Dependent Claim
103 words
A load-current monitor circuit for a MOS driver transistor comprising a MOS driver transistor and a substantially smaller MOS monitor transistor, said MOS transistors having been simultaneously formed, and having the same channel-polarity and essentially the same threshold voltage, said MOS transistors having their gates connected together and having their sources connected together; and a voltage-forcing circuit means having an input connected to the drain of said MOS driver transistor and having an output connected to the drain of said MOS monitor transistor, for forcing the drain voltage of said monitor transistor to be equal to the drain voltage of said driver transistor.
Claim 3
Dependent Claim
194 words
An integrated circuit having formed therein a MOS-transistor load-current monitor circuit comprising: a) a MOS driver transistor; b) a substantially smaller MOS monitor transistor having the same channel polarity and essentially the same threshold voltage as does said MOS driver transistor, said MOS transistors having been simultaneously formed; c) a first and second integrated-circuit signal-ground contact pads across which an integrated-circuit energizing voltage may be applied, the sources of said driver and monitor transistors being connected to a first of said signal-ground contact pads; d) a driver control-voltage conductor to which the gates of said driver and monitor transistors are connected, so that the levels of the currents through said driver and monitor transistors are proportional to a control voltage that may be applied to said control-voltage conductor; e) a voltage-forcing circuit means connected separately to the drain of said MOS driver transistor and the drain of said MOS monitor transistor, for forcing the drain voltage of said monitor transistor to be equal to the drain voltage of said driver transistor, so that the current through said monitor transistor remains proportional to the current through said driver transistor down to near zero driver-current levels.
Claim 4
Dependent Claim
194 words
An integrated circuit having formed therein a MOS-transistor load-current monitor circuit comprising: a) a MOS driver transistor; b) a substantially smaller MOS monitor transistor having the same channel polarity and essentially the same threshold voltage as does said MOS driver transistor, said MOS transistors having been simultaneously formed; c) a first and second integrated-circuit signal-ground contact pads across which an integrated-circuit energizing voltage may be applied, the sources of said driver and monitor transistors being connected to a first of said signal-ground contact pads; d) a driver control-voltage conductor to which the gates of said driver and monitor transistors are connected, so that the levels of the currents through said driver and monitor transistors are proportional to a control voltage that may be applied to said control-voltage conductor; e) a voltage-forcing circuit means connected separately to the drain of said MOS driver transistor and the drain of said MOS monitor transistor, for forcing the drain voltage of said monitor transistor to be equal to the drain voltage of said driver transistor, so that the current through said monitor transistor remains proportional to the current through said driver transistor down to near zero driver-current levels.
Claim 5
Dependent Claim
62 words
The integrated circuit of claim 2 wherein said MOS driver transistor and said MOS monitor transistor are N-channel transistors having been simultaneously formed in said integrated circuit and wherein said first and second signal-ground-contact-pads are for being connected to an external source of DC voltage with said first signal-ground contact-pad being at a more negative DC voltage than said second signal-ground contact-pad.
Claim 6
Dependent Claim
31 words
The integrated circuit of claim 2 additionally comprising a current-mirror means connected to said monitor transistor for generating a feed-back current that is proportional to the current through said monitor transistor.
Claim 7
Dependent Claim
39 words
The integrated circuit of claim 4 additionally comprising an integrated-circuit load-contact pad connected to said drain of said MOS driver transistor, so that an external load may be connected between said load contact-pad and said second signal-ground contact pad.
Claim 8
Dependent Claim
68 words
The integrated circuit of claim 4 additionally comprising an integrated-circuit input control-current pad, an input-signal reference contact-pad and a differential-voltage amplifier, said differential-voltage amplifier having one input connected to said input-signal reference contact-pad, having the other input connected to said input control-current contact-pad, and having an output connected to said driver control-voltage conductor; the output of said current-mirror means connected to said other input of said differential-voltage amplifier.
Claim 9
Dependent Claim
105 words
The integrated circuit of claim 6 wherein said current-mirror means is additionally for generating said proportional current of such polarity that when an external circuit, having a resistor connected in series with a control-voltage source, is connected between said input control-current contact-pad and said input-signal reference contact-pad, an increase in the amplitude of a control-current that may be introduced from the external circuit into said input control-current pad will result in a commensurate increase in the amplitude of the output current of said current-mirror means to maintain the voltage at said input control-current contact-pad at about zero voltage relative to said input-signal reference contact pad.
Claim 10
Dependent Claim
68 words
The integrated circuit of claim 4 wherein said voltage-forcing circuit means is comprised of a differential voltage-comparator amplifier having one and another inputs respectively connected to said drains of said driver and monitor transistors, a third transistor connected between said drain of said monitor transistor and said first signal-ground contact pad, the output of said differential voltage-comparator amplifier connected to the signal input element of said third transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-06-14 | 1996-12-14 | 1997-06-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-06-14 | 2000-12-14 | 2001-06-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-06-14 | 2004-12-14 | 2005-06-15 | $7700.00 | Window Closed / Lapsed |