Patent US5219774A successfully refreshed from Google Patents.
US5219774A
Expired / Lapsed
US
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Deposited tunneling oxide
Assignee: Xicor LLC
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Filing: 1990-06-26
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Granted: 1993-06-15
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Expires: 2010-06-26
Abstract
Abstract An apparatus and method for depositing a tunneling oxide layer between two conducting layers utilizing a low pressure, low temperature chemical vapor deposition (LPCVD) process is disclosed wherein tetraethylorthosilicate (TEOS) is preferably used. As applied to an electrically erasable programmable read only memory (EEPROM) device having polysilicon layers, the apparatus is constructed by forming a first layer of polysilicon, patterned as desired. A layer of silicon dioxide is then deposited by decomposition of TEOS to form the tunneling oxide to a predetermined thickness. If enhanced emission structures are desired, a layer of relatively thin tunneling oxide may be grown on the first layer of polysilicon. The oxide layer is then annealed and densified, preferably using steam and an inert gas at a specific temperature. A second layer of polysilicon is then formed on top of the tunneling oxide.
Inventors
- 👤 Gregory S. Vasche
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 05:19
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D64/00; H10D64/01; H10D64/031; H10D64/035; Y; Y10; Y10S; Y10S148/00; Y10S148/118
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
133 words
A method of manufacturing a tunneling oxide comprising the steps of: forming a conductive region serving as a source of tunneling electrons; depositing an electron tunneling layer over said conductive region, said tunneling layer comprising a layer of silicon dioxide formed using a low pressure chemical vapor deposition process comprising the use of a tetraethylorthosilicate vapor at a temperature between 450° and 1000° C. to form a layer of a thickness of less than 2000 Angstroms; annealing and silicon dioxide layer; and thereafter forming a conductive layer serving as a receptor of tunneling electrons on top of said silicon dioxide layer such that when a bias is applied between said conductive region and said conductive layer, electron tunneling will occur from said conductive region to said conductive layer through said silicon dioxide layer.
Claim 2
Independent Claim
133 words
A method of manufacturing a tunneling oxide comprising the steps of: forming a conductive region serving as a source of tunneling electrons; depositing an electron tunneling layer over said conductive region, said tunneling layer comprising a layer of silicon dioxide formed using a low pressure chemical vapor deposition process comprising the use of a tetraethylorthosilicate vapor at a temperature between 450° and 1000° C. to form a layer of a thickness of less than 2000 Angstroms; annealing and silicon dioxide layer; and thereafter forming a conductive layer serving as a receptor of tunneling electrons on top of said silicon dioxide layer such that when a bias is applied between said conductive region and said conductive layer, electron tunneling will occur from said conductive region to said conductive layer through said silicon dioxide layer.
Claim 3
Dependent Claim
37 words
The method of claim 1 wherein said annealing step comprises the step of exposing said silicon dioxide layer to a mixture of steam and an inert gas at a temperature of between 700° C. and 1100° C.
Claim 4
Dependent Claim
37 words
The method of claim 2 further comprising the step of thermally annealing said silicon dioxide layer in a solely nitrogen ambient at a temperature of between 700° C. and 1100° C. for between two to twenty minutes.
Claim 5
Dependent Claim
19 words
The method of claim 1 wherein the silicon dioxide layer is deposited at a temperature of approximately 600° C.
Claim 6
Independent Claim
139 words
A method of making an EEPROM device comprising the steps of: (a) depositing a layer of conductive material in a desired pattern, said conductive material serving as a source of tunneling electrons for programming said EEPROM device; (b) depositing a tunneling layer of silicon dioxide through which tunneling electrons travel when said EEPROM device is programmed, said tunneling layer being deposited over said conductive material to a thickness of less than 2000 Angstroms using a low pressure chemical vapor deposition process comprising the use of tetraethylorthosilicate, said silicon dioxide layer being thereby substantially defect-free; (c) annealing said silicon dioxide layer with a mixture of steam and an inert gas; and (d) forming a conductive layer on top of said silicon dioxide tunneling layer, said conductive layer serving as a receptor of tunneling electrons when said EEPROM device is programmed.
Claim 7
Independent Claim
139 words
A method of making an EEPROM device comprising the steps of: (a) depositing a layer of conductive material in a desired pattern, said conductive material serving as a source of tunneling electrons for programming said EEPROM device; (b) depositing a tunneling layer of silicon dioxide through which tunneling electrons travel when said EEPROM device is programmed, said tunneling layer being deposited over said conductive material to a thickness of less than 2000 Angstroms using a low pressure chemical vapor deposition process comprising the use of tetraethylorthosilicate, said silicon dioxide layer being thereby substantially defect-free; (c) annealing said silicon dioxide layer with a mixture of steam and an inert gas; and (d) forming a conductive layer on top of said silicon dioxide tunneling layer, said conductive layer serving as a receptor of tunneling electrons when said EEPROM device is programmed.
Claim 8
Independent Claim
96 words
A method of depositing a relatively thin tunneling dielectric in a semiconductor device comprising the steps of: (a) forming a conductive region; (b) thermally growing a relatively thin layer of tunneling oxide over said conductive region such that said conductive region forms a microtextured surface for promoting electron tunneling; (c) depositing a layer of tunneling silicon dioxide over said thermal oxide layer to a thickness less than 2000 Angstroms using a low pressure chemical vapor deposition process comprising the use of tetraethylorthosilicate; and (d) forming a conductive layer on top of said layer of silicon dioxide.
Claim 9
Independent Claim
96 words
A method of depositing a relatively thin tunneling dielectric in a semiconductor device comprising the steps of: (a) forming a conductive region; (b) thermally growing a relatively thin layer of tunneling oxide over said conductive region such that said conductive region forms a microtextured surface for promoting electron tunneling; (c) depositing a layer of tunneling silicon dioxide over said thermal oxide layer to a thickness less than 2000 Angstroms using a low pressure chemical vapor deposition process comprising the use of tetraethylorthosilicate; and (d) forming a conductive layer on top of said layer of silicon dioxide.
Claim 10
Dependent Claim
26 words
The method of claim 6 further including annealing said deposited silicon dioxide layer with a mixture of steam and an inert gas at a predetermined temperature.
Claim 11
Dependent Claim
16 words
The method of claim 6 wherein the thermally grown oxide layer is approximately 150 Angstroms thick.
Claim 12
Independent Claim
98 words
A method of depositing tunneling oxide in an EEPROM device comprising the steps of: (a) forming a layer of polysilicon in a desired pattern, said layer of polysilicon having a microtextured surface for promoting electron tunneling; (b) depositing a layer of tunneling silicon dioxide over said polysilicon layer to a thickness of less than 2000 Angstroms using a low pressure chemical vapor deposition process comprising the use of tetraethylorthosilicate; (c) annealing said silicon dioxide layer with a mixture of steam and an inert gas; and (d) forming a layer of polysilicon on top of said silicon dioxide layer.
Claim 13
Independent Claim
98 words
A method of depositing tunneling oxide in an EEPROM device comprising the steps of: (a) forming a layer of polysilicon in a desired pattern, said layer of polysilicon having a microtextured surface for promoting electron tunneling; (b) depositing a layer of tunneling silicon dioxide over said polysilicon layer to a thickness of less than 2000 Angstroms using a low pressure chemical vapor deposition process comprising the use of tetraethylorthosilicate; (c) annealing said silicon dioxide layer with a mixture of steam and an inert gas; and (d) forming a layer of polysilicon on top of said silicon dioxide layer.
Claim 14
Dependent Claim
23 words
The method of claim 9 wherein said silicon dioxide layer is deposited using tetraethylorthosilicate at a temperature of between 450° and 1000° C.
Claim 15
Independent Claim
178 words
A method of depositing tunneling oxide in an EEPROM device comprising the steps of: (a) forming a layer of polysilicon in a desired pattern; (b) growing a layer of thermal oxide over said layer of polysilicon such that said layer of polysilicon forms a microtextured surface for promoting electron tunneling; (c) etching said layer of thermal oxide to provide a thermal oxide layer of a desired thickness; (d) depositing a layer of tunneling silicon dioxide over said etched layer of thermal oxide in a thickness less than 2000 Angstroms thick with a low pressure chemical vapor deposition process using tetraethylorthosilicate as the gaseous medium; (e) annealing and densifying said layer of silicon dioxide by exposing said layer of silicon dioxide to a mixture of steam and an inert gas at a temperature of between 700° and 1100° C.; (f) further annealing said layer of silicon dioxide by exposing said layer of silicon dioxide to nitrogen at a temperature of between 700° and 1100° C.; and (g) forming a layer of polysilicon on top of said silicon dioxide layer.
Claim 16
Independent Claim
178 words
A method of depositing tunneling oxide in an EEPROM device comprising the steps of: (a) forming a layer of polysilicon in a desired pattern; (b) growing a layer of thermal oxide over said layer of polysilicon such that said layer of polysilicon forms a microtextured surface for promoting electron tunneling; (c) etching said layer of thermal oxide to provide a thermal oxide layer of a desired thickness; (d) depositing a layer of tunneling silicon dioxide over said etched layer of thermal oxide in a thickness less than 2000 Angstroms thick with a low pressure chemical vapor deposition process using tetraethylorthosilicate as the gaseous medium; (e) annealing and densifying said layer of silicon dioxide by exposing said layer of silicon dioxide to a mixture of steam and an inert gas at a temperature of between 700° and 1100° C.; (f) further annealing said layer of silicon dioxide by exposing said layer of silicon dioxide to nitrogen at a temperature of between 700° and 1100° C.; and (g) forming a layer of polysilicon on top of said silicon dioxide layer.
Claim 17
Dependent Claim
21 words
The method of claim 11 wherein the thermally grown oxide layer is approximately 150 Angstroms thick after said step of etching.
Claim 18
Dependent Claim
26 words
The method of claim 11 wherein said thermally grown oxide layer is relatively thin in comparison to said low pressure chemical vapor deposited silicon dioxide layer.
Claim 19
Dependent Claim
11 words
The method of claim 11 wherein said inert gas is argon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-06-14 | 1996-12-14 | 1997-06-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-06-14 | 2000-12-14 | 2001-06-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-06-14 | 2004-12-14 | 2005-06-15 | $7700.00 | Window Closed / Lapsed |