US5218325A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low noise oscillator
Assignee: General Dynamics Mission Systems Inc
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Filing: 1992-03-31
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Granted: 1993-06-08
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Expires: 2012-03-31
Abstract
Abstract A low noise oscillator for use in a radio which provides an output signal with high signal-to-noise ratio. The low noise oscillator includes a voltage controlled oscillator which produces an intermediate sinusoidal voltage signal in response to a DC tuning voltage. The voltage controlled oscillator includes a varactor and junction field effect transistor. The low noise oscillator also includes a buffer amplifier which receives the intermediate sinusoidal voltage signal from a tapped microstrip of the voltage controlled oscillator and produces a highly stable output signal proportional to the DC tuning voltage applied to the input of the low noise oscillator. The buffer amplifier employs a dual gate Gallium Arsenide field effect transistor.
Inventors
- 👤 Eric Trelewicz
- 👤 Michael N. Pickett
- 👤 Robert H. Bickley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 07:31
CPC Classifications
H; H03; H03B; H03B5/00; H03B5/08; H03B5/12; H03B5/1228; H03B5/1203; H03B5/1237; H03B5/124; H03B5/1243; H03B5/1296; H03B2200/00; H03B2200/003; H03B2200/0034; H03B2200/004; H03B2200/006; H03B2200/0086; H03B2200/0088; H03B2201/00; H03B2201/02; H03B2201/0208; H03B5/18; H03B5/1841; H03B5/1847; H03B5/1852
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
105 words
A low noise oscillator comprising: input means adapted to receive a DC tuning voltage proportional to an output signal; voltage controlled oscillator means coupled to said input means, said voltage controlled oscillator means responsive to said DC tuning voltage for providing an intermediate sinusoidal output signal proportional to said DC tuning voltage; and buffer amplifier means coupled to said voltage controlled oscillator means, said buffer amplifier means transforming said intermediate sinusoidal output signal to said output signal of a particular frequency proportional to said DC tuning voltage by maintaining a nearly maximum power output to provide a high signal-to-noise ratio and a low noise floor.
Claim 2
Dependent Claim
105 words
A low noise oscillator comprising: input means adapted to receive a DC tuning voltage proportional to an output signal; voltage controlled oscillator means coupled to said input means, said voltage controlled oscillator means responsive to said DC tuning voltage for providing an intermediate sinusoidal output signal proportional to said DC tuning voltage; and buffer amplifier means coupled to said voltage controlled oscillator means, said buffer amplifier means transforming said intermediate sinusoidal output signal to said output signal of a particular frequency proportional to said DC tuning voltage by maintaining a nearly maximum power output to provide a high signal-to-noise ratio and a low noise floor.
Claim 3
Dependent Claim
72 words
A low noise oscillator as claimed in claim 1, wherein said voltage controlled oscillator means includes: oscillator resonant circuit means coupled to said input means, said oscillator resonant circuit means providing said intermediate sinusoidal output signal of a frequency proportional to said DC tuning voltage; and first amplifier means coupled in a feedback loop with said oscillator resonant circuit means, said first amplifier means providing gain to said intermediate sinusoidal output signal.
Claim 4
Dependent Claim
44 words
A low noise oscillator as claimed in claim 2, wherein said oscillator resonant circuit means includes: a first inductor coupled to said input means; and a varactor coupled to said first inductor, said varactor providing a capacitance which varies with said DC tuning voltage.
Claim 5
Dependent Claim
24 words
A low noise oscillator as claimed in claim 3, wherein said oscillator resonant circuit means further includes a second inductor coupled to said varactor.
Claim 6
Dependent Claim
62 words
A low noise oscillator as claimed in claim 4, wherein said oscillator resonant circuit means further includes a microstrip coupled serially between said second inductor and ground, said microstrip having a tap output for providing said intermediate sinusoidal output signal, said tap output of said microstrip being positioned such that said tap output maximizes a voltage of said intermediate sinusoidal output signal.
Claim 7
Dependent Claim
59 words
A low noise oscillator as claimed in claim 2, wherein said first amplifier means includes a junction field effect transistor (JFET), said JFET having a source input, a drain output, and an gate input, said gate input being coupled to ground, said source input and drain output being coupled in a feedback arrangement with said oscillator resonant circuit means.
Claim 8
Dependent Claim
37 words
A low noise oscillator as claimed in claim 6, wherein said first amplifier means further includes: a first inductor coupled to said source input of said JFET; and a resistor coupled between said first inductor and ground.
Claim 9
Dependent Claim
27 words
A low noise oscillator as claimed in claim 6, wherein said first amplifier means further includes second inductor means coupled to said drain output of said JFET.
Claim 10
Dependent Claim
51 words
A low noise oscillator as claimed in claim 8, wherein said first amplifier means further includes: a first capacitor coupled between said source input of said JFET and said oscillator resonant circuit means; and a second capacitor coupled between said drain output of said JFET and said oscillator resonant circuit means.
Claim 11
Dependent Claim
58 words
A low noise oscillator as claimed in claim 2, wherein said buffer amplifier means includes a dual gate field effect transistor (FET), said dual gate FET having first and second gate inputs, a source input and a drain output, said first gate input being coupled to said oscillator resonant circuit means for amplifying said intermediate sinusoidal output signal.
Claim 12
Dependent Claim
29 words
A low noise oscillator as claimed in claim 10, wherein said dual gate FET includes a Gallium Arsenide FET providing for low noise and having a high input resistance.
Claim 13
Dependent Claim
45 words
A low noise oscillator as claimed in claim 10, wherein said buffer amplifier means further includes active biasing means coupled to said dual gate FET, said active biasing means for providing bias current to said dual gate FET for maximizing power of said output signal.
Claim 14
Dependent Claim
98 words
A low noise oscillator as claimed in claim 12, wherein said active bias means includes: first transistor means coupled to said source input of said dual gate FET via a first resistor, said first transistor means including a first transistor having a base, emitter, and collector, said first resistor being coupled between said source of said dual gate FET and said collector of said first transistor; and second transistor means including a second transistor having a base, emitter, and collector, said collector of said second transistor coupled to said base of said first transistor via a second resistor.
Claim 15
Dependent Claim
118 words
A low noise oscillator as claimed in claim 13, wherein: said first transistor means further includes: a first capacitor coupled between said collector of said first transistor and ground; a second capacitor coupled between said first resistor and ground; and a third capacitor coupled between a common connection of said source and second gate inputs of said dual gate FET and said first resistor and ground; and said second transistor means further including: third resistor means coupled to said emitter of said second transistor; fourth resistor coupled between third resistor and said base of said second transistor; and fifth resistor coupled to a common connection of said base of said second transistor and said fourth resistor and ground.
Claim 16
Dependent Claim
62 words
A low noise oscillator as claimed in claim 14, wherein said buffer amplifier means further includes: a transformer coupled between said third resistor and said drain output of said dual gate FET, said transformer providing a center tap output for impedance matching said output signal; and sixth capacitor coupled to said center tap output of said transformer for providing said output signal.
Claim 17
Dependent Claim
156 words
In a radio, a low noise oscillator circuit for providing an output signal of a particular frequency for tuning said radio, said low noise oscillator comprising: input means adapted to receive a DC tuning voltage proportional to said output signal; voltage controlled oscillator means coupled to said input means, said voltage controlled oscillator means responsive to said DC tuning voltage for providing an intermediate sinusoidal output signal proportional to said DC tuning voltage; buffer amplifier means coupled to said voltage controlled oscillator means, said buffer amplifier means transforming said intermediate sinusoidal output signal to said output signal of said particular frequency proportional to said DC tuning voltage by maintaining a nearly maximum power output to provide a high signal-to-noise ratio and a low noise floor; and synthesizer/phase locked loop means coupled between said buffer amplifier means and said input means, said synthesizer means providing for adjusting said DC tuning voltage in response to said output signal.
Claim 18
Dependent Claim
156 words
In a radio, a low noise oscillator circuit for providing an output signal of a particular frequency for tuning said radio, said low noise oscillator comprising: input means adapted to receive a DC tuning voltage proportional to said output signal; voltage controlled oscillator means coupled to said input means, said voltage controlled oscillator means responsive to said DC tuning voltage for providing an intermediate sinusoidal output signal proportional to said DC tuning voltage; buffer amplifier means coupled to said voltage controlled oscillator means, said buffer amplifier means transforming said intermediate sinusoidal output signal to said output signal of said particular frequency proportional to said DC tuning voltage by maintaining a nearly maximum power output to provide a high signal-to-noise ratio and a low noise floor; and synthesizer/phase locked loop means coupled between said buffer amplifier means and said input means, said synthesizer means providing for adjusting said DC tuning voltage in response to said output signal.
Claim 19
Dependent Claim
56 words
In a radio, a low noise oscillator as claimed in claim 16, wherein there is further included: means for switching coupled to the synthesizer means; and means for receiving coupled to the means for switching, said means for receiving being tuned to receive broadcast signals in response to said particular frequency indicated by said output signal.
Claim 20
Dependent Claim
58 words
In a radio, a low noise oscillator as claimed in claim 17, wherein there is further included means for transmitting coupled to said means for switching, said means for transmitting signals of said particular frequency of said output signal, said means for transmitting being operated in response to selection by said means for switching to transmit broadcast signals.
Claim 21
Dependent Claim
62 words
In a radio, a low noise oscillator as claimed in claim 17, wherein there is further included means for self-test generation coupled to said means for switching, said means for self-test generation operating in response to selection by said means for switching to produce a test signal for test tuning said radio and said low noise oscillator for a plurality of frequencies.
Claim 22
Dependent Claim
174 words
A low noise oscillator circuit comprising: input means adapted to receive a DC tuning voltage; oscillator resonant circuit means coupled to said input means, said oscillator resonant circuit means including a varactor for providing an intermediate sinusoidal output signal; first amplifier means including a junction field effect transistor (JFET) coupled to said varactor of said oscillator resonant circuit means, said first amplifier means for amplifying said intermediate sinusoidal output signal; buffer amplifier means including a dual gate field effect transistor, said dual gate field effect transistor coupled to said oscillator resonant circuit means, said buffer amplifier means providing an output signal whose frequency is proportional to said DC tuning voltage by maintaining a nearly maximum power output to provide a high signal-to-noise ratio and a low noise floor; power supply means coupled to said JFET and to said dual gate field effect transistor, said power supply means for supplying a low noise power source; and output means coupled to said buffer amplifier means, said output means including coaxial cable for transmitting said output signal.
Claim 23
Dependent Claim
174 words
A low noise oscillator circuit comprising: input means adapted to receive a DC tuning voltage; oscillator resonant circuit means coupled to said input means, said oscillator resonant circuit means including a varactor for providing an intermediate sinusoidal output signal; first amplifier means including a junction field effect transistor (JFET) coupled to said varactor of said oscillator resonant circuit means, said first amplifier means for amplifying said intermediate sinusoidal output signal; buffer amplifier means including a dual gate field effect transistor, said dual gate field effect transistor coupled to said oscillator resonant circuit means, said buffer amplifier means providing an output signal whose frequency is proportional to said DC tuning voltage by maintaining a nearly maximum power output to provide a high signal-to-noise ratio and a low noise floor; power supply means coupled to said JFET and to said dual gate field effect transistor, said power supply means for supplying a low noise power source; and output means coupled to said buffer amplifier means, said output means including coaxial cable for transmitting said output signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-06-07 | 1996-12-07 | 1997-06-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-06-07 | 2000-12-07 | 2001-06-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-06-07 | 2004-12-07 | 2005-06-08 | $7700.00 | Window Closed / Lapsed |