Method of fabricating a semiconductor device having a lightly-doped drain structure

Claim 1

A method of manufacturing a semiconductor device comprising the steps of: forming a gate insulating film on a semiconductor body of one conductivity type; forming a gate electrode on said gate insulating film; ion-implanting an impurity into said semiconductor body with said gate electrode as a mask, followed by a thermal treatment to form lightly doped first and second impurity regions of the opposite conductivity type in the surface area of said semiconductor body, the first and second impurity regions having diffusion end portions extending below said gate electrode for a predetermined distance; forming an insulating member on said first and second impurity regions and in contact with at least the side walls of said gate electrode; and ion-implanting an impurity of the opposite conductivity type into said first and second impurity regions with said first gate and insulating member as a mask, followed by a thermal treatment to form highly doped third and fourth impurity regions within said first and second impurity regions, respectively, with end portions located below said gate electrode and having a higher impurity concentration than the impurity concentration of said first and second impurity regions.

Claim 2

A method of manufacturing a semiconductor device comprising the steps of: forming a gate insulating film on a semiconductor body of one conductivity type; forming a gate electrode on said gate insulating film; ion-implanting an impurity into said semiconductor body with said gate electrode as a mask, followed by a thermal treatment to form lightly doped first and second impurity regions of the opposite conductivity type in the surface area of said semiconductor body, the first and second impurity regions having diffusion end portions extending below said gate electrode for a predetermined distance; forming an insulating member on said first and second impurity regions and in contact with at least the side walls of said gate electrode; and ion-implanting an impurity of the opposite conductivity type into said first and second impurity regions with said first gate and insulating member as a mask, followed by a thermal treatment to form highly doped third and fourth impurity regions within said first and second impurity regions, respectively, with end portions located below said gate electrode and having a higher impurity concentration than the impurity concentration of said first and second impurity regions.