Patent US5208562A successfully refreshed from Google Patents.
US5208562A
Expired / Lapsed
US
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Bus terminator circuit having RC elements
Assignee: ISP TECHNOLOGIES Inc A CA CORP
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Filing: 1991-10-07
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Granted: 1993-05-04
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Expires: 2011-10-07
Abstract
Abstract A power bus terminator circuit for use with personal computers and the like is designed to hold the circuit termination pins at a pre-established voltage while dissipating a relatively small amount of power (approximately 20 mW) during steady state operation. This is accomplished by connecting sets of first and second high impedance resistors together at a terminal, and in series between the bus terminator pins. Each of the terminals is connected through a relatively low value resistor to each one of the circuit termination pins, and through a capacitor, to one of the bus terminals to permit high-speed operation of the AC switching transitions of the circuits coupled to the termination pins. A relatively low amount of power (approximately another 30 mW or so) is consumed during the transitions of the signals appearing on the termination pins. The circuit results in a power dissipation reduction of between 90% to 75% over standard bus terminator circuits.
Inventors
- 👤 Louis Schirm, IV
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 12:38
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/0264; H04L25/0298; G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4063; G06F13/4068; G06F13/4086; Y; Y02; Y02D; Y02D10/00
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
180 words
A bus terminator circuit including in combination: a first bus pin; a second bus pin; first and second resistors having first and second predetermined values of resistance, each of said first and second resistors having first and second ends, with the second end of said first resistor connected at a first junction to the first end of said second resistor and the first end said first resistor connected to said first bus pin and the second end of said second resistor connected to said second bus pin; a circuit termination pin; a first capacitor having first and second terminals, with the first terminal of said first capacitor connected to said second bus pin and the second terminal of said first capacitor connected to said first junction; and a third resistor having first and second ends, with the first end thereof connected to said first junction and the second end of said third resistor connected to said circuit termination pin, said third resistor having a third predetermined value of resistance substantially less than said first and second predetermined values of resistance.
Claim 2
Dependent Claim
180 words
A bus terminator circuit including in combination: a first bus pin; a second bus pin; first and second resistors having first and second predetermined values of resistance, each of said first and second resistors having first and second ends, with the second end of said first resistor connected at a first junction to the first end of said second resistor and the first end said first resistor connected to said first bus pin and the second end of said second resistor connected to said second bus pin; a circuit termination pin; a first capacitor having first and second terminals, with the first terminal of said first capacitor connected to said second bus pin and the second terminal of said first capacitor connected to said first junction; and a third resistor having first and second ends, with the first end thereof connected to said first junction and the second end of said third resistor connected to said circuit termination pin, said third resistor having a third predetermined value of resistance substantially less than said first and second predetermined values of resistance.
Claim 3
Dependent Claim
26 words
The combination according to claim 1 wherein the value of resistance of said second resistor is greater than the value of resistance of said first resistor.
Claim 4
Dependent Claim
41 words
The combination according to claim 1 further including means connected to said first and second bus pins for applying potential thereto, wherein the potential applied to said second bus pin is different from the potential applied to said first bus pin.
Claim 5
Dependent Claim
37 words
The combination according to claim 3 wherein the resistance value of said third resistor is less than 100 OHMS, and the resistance value of each of said first and second resistors is in excess of 1000 OHMS.
Claim 6
Dependent Claim
26 words
The combination according to claim 4 wherein the value of resistance of said second resistor is greater than the value of resistance of said first resistor.
Claim 7
Dependent Claim
36 words
The combination according to claim 5 wherein said means for applying potential to said first bus pin supplied direct current operating potential, and said means for applying potential to said second bus pin supplies ground potential.
Claim 8
Dependent Claim
43 words
The combination according to claim 1 further including means connected to said first bus pin for supplying direct current operating potential to said first bus pin, and means connected to said second bus pin for supplying ground potential to said second bus pin.
Claim 9
Dependent Claim
37 words
The combination according to claim 7 wherein the resistance value of said third resistor is less than 100 OHMS, and the resistance value of each of said first and second resistors is in excess of 1000 OHMS.
Claim 10
Dependent Claim
219 words
A power bus terminator circuit including in combination: a first bus pin; a second bus pin; a predetermined number of sets of first and second resistors, each resistor having first and second ends, with the second end of the first resistor in each set connected to the first end of the second resistor of each set to realize a predetermined number of first junctions corresponding to said predetermined number of sets of resistors, with the first ends of said first resistors connected to said first bus pin, and the second ends of said second resistors connected to said second bus pin; a predetermined number of circuit termination pins equal in number to said predetermined number of sets of first and second resistors; a predetermined number of first capacitors, each having first and second terminals, with the first terminal of each of said first capacitors connected to said second bus pin and the second terminal of each of said first capacitors connected to a different one of said predetermined number of first junctions; and a predetermined number of third resistors, each having first and second ends, with the first ends thereof each connected to a different one of said first junctions, and the second ends of said third resistors each connected to a different one of said circuit termination pins.
Claim 11
Dependent Claim
219 words
A power bus terminator circuit including in combination: a first bus pin; a second bus pin; a predetermined number of sets of first and second resistors, each resistor having first and second ends, with the second end of the first resistor in each set connected to the first end of the second resistor of each set to realize a predetermined number of first junctions corresponding to said predetermined number of sets of resistors, with the first ends of said first resistors connected to said first bus pin, and the second ends of said second resistors connected to said second bus pin; a predetermined number of circuit termination pins equal in number to said predetermined number of sets of first and second resistors; a predetermined number of first capacitors, each having first and second terminals, with the first terminal of each of said first capacitors connected to said second bus pin and the second terminal of each of said first capacitors connected to a different one of said predetermined number of first junctions; and a predetermined number of third resistors, each having first and second ends, with the first ends thereof each connected to a different one of said first junctions, and the second ends of said third resistors each connected to a different one of said circuit termination pins.
Claim 12
Dependent Claim
47 words
The combination according to claim 9 wherein each of said predetermined number of third resistors has a resistance of less than 100 OHMS, and each of said first and second resistors in said predetermined number of sets of such resistors has a resistance of over 1000 OHMS.
Claim 13
Dependent Claim
43 words
The combination according to claim 10 further including means connected to said first bus pin for applying direct current operating potential to said first bus pin and means connected to said second bus pin for applying ground potential to said second bus pin.
Claim 14
Dependent Claim
43 words
The combination according to claim 9 further including means connected to said first bus pin for applying direct current operating potential to said first bus pin, and means connected to said second bus pin for applying ground potential to said second bus pin.
Claim 15
Dependent Claim
47 words
The combination according to claim 12 wherein each of said predetermined number of third resistors has a resistance of less than 100 OHMS, and each of said first and second resistors in said predetermined number of sets of such resistors has a resistance of over 1000 OHMS.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-05-03 | 1996-11-02 | 1997-05-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-05-03 | 2000-11-02 | 2001-05-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-05-03 | 2004-11-02 | 2005-05-04 | $7700.00 | Window Closed / Lapsed |