Patent US5206646A successfully refreshed from Google Patents.
US5206646A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital modulating method
Assignee: Sony Corp
•
Filing: 1990-10-26
•
Granted: 1993-04-27
•
Expires: 2010-10-26
Abstract
Abstract This invention relates to a digital modulating method used for recording a PCM audio signal, computer data, and etc. on a recording medium such as an optical disc. The digital modulating method is constructed so that the minimum length between transition could be the maximum in encoding M bits into N bits (M<N), and can generate clock pulses with a simple circuit arrangement by satisfying the relationship N=αM, where α is an integer equal to or larger than 2. Further, by converting a predetermined unit of input data into a first code signal according to substantially the same conversion rule and selectively adding coupling bits of different bit number to each junction between a first code signal and an adjacent code signal, the digital modulating method is adaptable for various transmission systems with a simple arrangement.
Inventors
- 👤 Yoichiro Sako
- 👤 Tamotsu Yamagami
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 21:51
CPC Classifications
H; H03; H03M; H03M5/00; H03M5/02; H03M5/04; H03M5/14; H03M5/145; G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
96 words
A digital modulating method for coding M data bits in to N channel bits (M<N) comprising the steps of: forming said N channel bits of a number of bits that satisfies N=αM, where α is 2; arranging a number of successive "0"s between "1" and "1" in a row of coded bits; and wherein said coding of M data bits comprises eight to fourteen modulation and further comprising the steps of selecting a pattern of successive fourteen channel bits in said N channel bits and a pattern of the eight to fourteen modulation to be identical.
Claim 2
Dependent Claim
96 words
A digital modulating method for coding M data bits in to N channel bits (M<N) comprising the steps of: forming said N channel bits of a number of bits that satisfies N=αM, where α is 2; arranging a number of successive "0"s between "1" and "1" in a row of coded bits; and wherein said coding of M data bits comprises eight to fourteen modulation and further comprising the steps of selecting a pattern of successive fourteen channel bits in said N channel bits and a pattern of the eight to fourteen modulation to be identical.
Claim 3
Dependent Claim
34 words
A digital modulating method according to claim 1, wherein the step of arranging a number of successive "0"s between "1" and "1" in a row of coded data bits comprises arranging two successive "0"s.
Claim 4
Dependent Claim
26 words
A digital modulating method according to claim 1, further comprising the step of selecting two channel bits exclusive of said fourteen channel bits to be "0".
Claim 5
Dependent Claim
81 words
A digital modulating method for coding M data bits into N channel bits (M<N) comprising the steps of selecting M and N to satisfy the relationship N=αM, and selecting α to be an integer equal to 2, and wherein said coding of said M data bits comprises eight to fourteen modulation and further comprising the step of selecting a pattern of successive fourteen channel bits in said N-channel bits and a pattern of the eight to fourteen modulation to be identical.
Claim 6
Dependent Claim
81 words
A digital modulating method for coding M data bits into N channel bits (M<N) comprising the steps of selecting M and N to satisfy the relationship N=αM, and selecting α to be an integer equal to 2, and wherein said coding of said M data bits comprises eight to fourteen modulation and further comprising the step of selecting a pattern of successive fourteen channel bits in said N-channel bits and a pattern of the eight to fourteen modulation to be identical.
Claim 7
Dependent Claim
26 words
A digital modulating method according to claim 4, further comprising the step of selecting two channel bits exclusive of said fourteen channel bits to be "0".
Claim 8
Dependent Claim
83 words
An information recording medium having recorded thereon digital signals modulated so that a minimum value of a number of successive "0"s sandwiched between "1" and "1" in a row of coded bits from M data bits into N channel bits (M<N) is a maximum, wherein the coded bits from M data bits are modulated according to eight to fourteen modulation and a pattern of fourteen channel bits in the N channel bits is identical to a pattern of the eight to fourteen modulation.
Claim 9
Dependent Claim
83 words
An information recording medium having recorded thereon digital signals modulated so that a minimum value of a number of successive "0"s sandwiched between "1" and "1" in a row of coded bits from M data bits into N channel bits (M<N) is a maximum, wherein the coded bits from M data bits are modulated according to eight to fourteen modulation and a pattern of fourteen channel bits in the N channel bits is identical to a pattern of the eight to fourteen modulation.
Claim 10
Dependent Claim
26 words
An information recording medium according to claim 6, wherein said N channel bits satisfy N=αM, where α is an integer equal to or larger than 2.
Claim 11
Dependent Claim
37 words
An information recording medium according to claim 6, wherein recording tracks of said information recording medium comprise a servo area on which pits for servo control are pre-recorded and a data area on which data is recorded.
Claim 12
Dependent Claim
17 words
An information recording medium according to claim 6, wherein said information recording medium comprises a magneto-optical disc.
Claim 13
Dependent Claim
131 words
A digital modulating circuit comprising: converting means for converting a predetermined unit of input data into a first code signal of successive words according to a predetermined conversion rule; a plurality of coupling bits adding means each receiving said first code signal, each for generating a respective second code signal of successive words having a different number of bits to be added to a junction adjacent to successive words of said first code signal, and each for selectively inserting successive words of said second code signal having a different number of bits at each said junctions; and means for selecting one of said plurality of coupling bit adding means based on a predetermined minimum length between transitions in said converting means when converting said input data into said first code signal.
Claim 14
Dependent Claim
131 words
A digital modulating circuit comprising: converting means for converting a predetermined unit of input data into a first code signal of successive words according to a predetermined conversion rule; a plurality of coupling bits adding means each receiving said first code signal, each for generating a respective second code signal of successive words having a different number of bits to be added to a junction adjacent to successive words of said first code signal, and each for selectively inserting successive words of said second code signal having a different number of bits at each said junctions; and means for selecting one of said plurality of coupling bit adding means based on a predetermined minimum length between transitions in said converting means when converting said input data into said first code signal.
Claim 15
Dependent Claim
36 words
A digital modulating circuit according to claim 10, wherein said first code signal is generated by said converting means in accordance with the conversion rule of eight to fourteen modulation that comprises said predetermined conversion rule.
Claim 16
Dependent Claim
106 words
A digital demodulating circuit supplied with modulated data in which a word of a selected one of a plurality of second code signals of different relative bit numbers than said modulated data was installed at a junction adjacent successive words of a first code signal converted according to a predetermined conversion rule, comprising: separator means responsive to a signal identifying which one of the plurality of second code signals was inserted and for excluding said second code signal from said modulated data and extracting said first code signal; and converting means for converting said first code signal into original data according to said predetermined conversion rule.
Claim 17
Dependent Claim
106 words
A digital demodulating circuit supplied with modulated data in which a word of a selected one of a plurality of second code signals of different relative bit numbers than said modulated data was installed at a junction adjacent successive words of a first code signal converted according to a predetermined conversion rule, comprising: separator means responsive to a signal identifying which one of the plurality of second code signals was inserted and for excluding said second code signal from said modulated data and extracting said first code signal; and converting means for converting said first code signal into original data according to said predetermined conversion rule.
References Cited (Backward Citations)
US3689899A
Cited
US4323931A
Cited
US4358852A
Cited
FR2486740A1
Cited
US4496934A
Cited
US4456905A
Cited
EP0074656A2
Cited
US4598326A
Cited
US4728929A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-04-26 | 1996-10-26 | 1997-04-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-04-26 | 2000-10-26 | 2001-04-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-04-26 | 2004-10-26 | 2005-04-27 | $7700.00 | Window Closed / Lapsed |