Semiconductor integrated circuit

Claim 2

A semiconductor integrated circuit, comprising: a semiconductor substrate; a dynamic RAM memory cell array having bit lines mounted on said substrate; a power source line and a ground line, mounted on said substrate, for supplying an internal power supply voltage; and a charging circuit, mounted on said substrate, for charging the bit lines of the memory cell array at said given voltage for a data sensing operation; said power source line and said ground line being disposed one over the other in a laminated manner along their length with a layer of dielectric substance located between said power source line and said ground line to form a capacitance element having a predetermined capacitance value that prevents said internal power supply voltage from dropping below a given voltage.

Claim 3

A semiconductor integrated circuit according to claim 1, wherein said power source line and said ground line are composed of aluminum.

Claim 4

A semiconductor integrated circuit according to claim 1, wherein said charging circuit includes at least one active element, and one of said power source line and said ground line is composed of aluminum and the other of said power source line and said ground line is composed of the same material as said active element.

Claim 5

A semiconductor integrated circuit according to claim 3, wherein said active element includes one of the compounds from the group consisting of polysilicon and polycide.

Claim 6

A semiconductor integrated circuit according to claim 1, wherein said dielectric substance is SiO 2 .

Claim 7

A semiconductor integrated circuit according to claim 1, wherein said dielectric substance includes one of the compounds from the group consisting of nitrides and Ta 2 O 5 .

Claim 10

A semiconductor integrated circuit, comprising: a semiconductor substrate; a dynamic random access memory cell array having bit lines mounted on said substrate; a precharge circuit, mounted on said substrate, for charging the bit lines of the memory cell array; a power buss mounted on said substrate, for supplying a power supply voltage to the precharge circuit; and a ground buss mounted on said substrate; wherein said power buss and said ground buss are disposed one over the other in a laminated manner along a majority of the length of said power buss with a layer of a dielectric substance being interposed therebetween so that said power buss, said ground buss and said dielectric substance form a capacitance element having a predetermined capacitance value that prevents said power supply voltage from dropping below a given voltage during a precharging operation.

Claim 11

A semiconductor integrated circuit, comprising: a semiconductor substrate; a dynamic random access memory cell array having bit lines mounted on said substrate; a precharge circuit, mounted on said substrate, for charging the bit lines of the memory cell array; a power buss mounted on said substrate, for supplying a power supply voltage to the precharge circuit; and a ground buss mounted on said substrate; wherein said power buss and said ground buss are disposed one over the other in a laminated manner along a majority of the length of said power buss with a layer of a dielectric substance being interposed therebetween so that said power buss, said ground buss and said dielectric substance form a capacitance element having a predetermined capacitance value that prevents said power supply voltage from dropping below a given voltage during a precharging operation.

Claim 12

A semiconductor integrated circuit according to claim 8, wherein said power buss and said ground buss are composed of aluminum.

Claim 13

A semiconductor integrated circuit according to claim 8, wherein said precharge circuit includes at least one active element, and one of said power buss and said ground buss is composed of aluminum and the other of said power buss and ground buss is composed of a material identical to said active element such as polysilicon or polycide.

Claim 14

A semiconductor integrated circuit according to claim 8, wherein said dielectric substance is SiO 2 .

Claim 15

A semiconductor integrated circuit according to claim 8, wherein said dielectric substance is composed of a nitride or Ta 2 O 5 having a high dielectric constant.

Claim 16

A semiconductor integrated circuit, comprising: a semiconductor substrate; a dynamic RAM memory cell array having bit lines mounted on said substrate; a precharge circuit, mounted on said substrate, for precharging the bit lines of the memory cell array; a power source line mounted on said substrate, for supplying an internal power supply voltage to the precharge circuit; and a ground line mounted on said substrate; wherein said power source line and said ground line are disposed one over the other in a laminated manner along their length with a layer of dielectric substance being interposed therebetween so that said power source line, said ground line, and said dielectric substance form a capacitance element having a predetermined capacitance value that prevents said internal power supply voltage from dropping below a given voltage.

Claim 17

A semiconductor integrated circuit, comprising: a semiconductor substrate; a dynamic RAM memory cell array having bit lines mounted on said substrate; a precharge circuit, mounted on said substrate, for precharging the bit lines of the memory cell array; a power source line mounted on said substrate, for supplying an internal power supply voltage to the precharge circuit; and a ground line mounted on said substrate; wherein said power source line and said ground line are disposed one over the other in a laminated manner along their length with a layer of dielectric substance being interposed therebetween so that said power source line, said ground line, and said dielectric substance form a capacitance element having a predetermined capacitance value that prevents said internal power supply voltage from dropping below a given voltage.

Claim 18

A semiconductor integrated circuit according to claim 13, wherein said power source line and said ground line are composed of aluminum.

Claim 19

A semiconductor integrated circuit according to claim 13, wherein said precharge circuit includes at least one active element, and one of said power source line and said ground line is composed of aluminum and the other of said power source line and said ground line is composed of a material identical to said active element such as polysilicon or polycide.

Claim 20

A semiconductor integrated circuit according to claim 13, wherein said dielectric substance is SiO 2 .

Claim 21

A semiconductor integrated circuit according to claim 13, wherein said dielectric substance is composed of either a nitride or Ta 2 O 5 having a high dielectric constant.

Claim 22

A semiconductor integrated circuit, comprising: a semiconductor substrate; a dynamic RAM memory cell array having bit lines mounted on said substrate; a charging circuit, mounted on said substrate, for charging the bit lines of the memory cell array for data sensing; a power source line mounted on said substrate, for supplying an internal power supply voltage to the charging circuit; and a ground line mounted on said substrate; wherein said power source line and said ground line are disposed one over the other in a laminated manner along their length with a layer of a dielectric substance being interposed therebetween, the laminated structure forming a capacitance element having a predetermined capacitance value that prevents said internal power supply voltage from dropping below a given voltage.

Claim 23

A semiconductor integrated circuit, comprising: a semiconductor substrate; a dynamic RAM memory cell array having bit lines mounted on said substrate; a charging circuit, mounted on said substrate, for charging the bit lines of the memory cell array for data sensing; a power source line mounted on said substrate, for supplying an internal power supply voltage to the charging circuit; and a ground line mounted on said substrate; wherein said power source line and said ground line are disposed one over the other in a laminated manner along their length with a layer of a dielectric substance being interposed therebetween, the laminated structure forming a capacitance element having a predetermined capacitance value that prevents said internal power supply voltage from dropping below a given voltage.

Claim 24

A semiconductor integrated circuit according to claim 18, wherein said power source line and said ground line are composed of aluminum.

Claim 25

A semiconductor integrated circuit according to claim 18, wherein said charging circuit includes at least one active element, and one of said power source line and said ground line is composed of aluminum and the other of said power source line and said ground line is composed of a material identical to said active element such as polysilicon or polycide.

Claim 26

A semiconductor integrated circuit according to claim 18, wherein said dielectric substance is SiO 2 .

Claim 27

A semiconductor integrated circuit according to claim 18, wherein said dielectric substance is composed of either a nitride or Ta 2 O 5 having a high dielectric constant.

Claim 28

A semiconductor integrated circuit, comprising: a semiconductor substrate; a dynamic RAM memory cell array having bit lines mounted on said substrate; a charging circuit, mounted on said substrate, for charging the bit lines of the memory cell array for data sensing; a conductive line mounted on said substrate, for supplying an internal power supply voltage to the charging circuit; and a ground line mounted on said substrate; wherein said conductive line and said ground line are disposed one over the other in a laminated manner along their length with a layer of a dielectric substance being interposed therebetween, the laminated structure forming a capacitance element having a predetermined capacitance value that prevents said internal power supply voltage from dropping below a given voltage.

Claim 29

A semiconductor integrated circuit, comprising: a semiconductor substrate; a dynamic RAM memory cell array having bit lines mounted on said substrate; a charging circuit, mounted on said substrate, for charging the bit lines of the memory cell array for data sensing; a conductive line mounted on said substrate, for supplying an internal power supply voltage to the charging circuit; and a ground line mounted on said substrate; wherein said conductive line and said ground line are disposed one over the other in a laminated manner along their length with a layer of a dielectric substance being interposed therebetween, the laminated structure forming a capacitance element having a predetermined capacitance value that prevents said internal power supply voltage from dropping below a given voltage.

Claim 30

A semiconductor integrated circuit according to claim 23, wherein said conductive line and said ground line are composed of aluminum.

Claim 31

A semiconductor integrated circuit according to claim 23, wherein said charging circuit includes at least one active element, and one of said conductive line and said ground line is composed of aluminum and the other of said conductive line and said ground line is composed of a material identical to said active element such as polysilicon or polycide.

Claim 32

A semiconductor integrated circuit according to claim 23, wherein said dielectric substance is SiO 2 .

Claim 33

A semiconductor integrated circuit according to claim 23, wherein said dielectric substance is composed of either a nitride or Ta 2 O 5 having a high dielectric constant.