Drive circuit for voltage driven type semiconductor device

Claim 2

A drive circuit for a voltage driven type semiconductor device which has a control terminal, a first main terminal, and a second main terminal, comprising: a photocoupler which is turned on and off by a drive signal fed from an external control circuit; a pair of output transistors whose bases are connected to each other, and are operatively connected to an output of said photocoupler, said control terminal and said first main terminal of said semiconductor device being supplied with control signals from outputs of said output transistors, and said first main terminal and said second main terminal of said semiconductor device being made conductive or nonconductive by said control signals; a serial circuit which includes a resistor and a Zener diode, a first terminal of said serial circuit being connected to said second main terminal of said semiconductor device so that said serial circuit conducts when a voltage across said first and second main terminals of said semiconductor device exceeds a predetermined voltage; first detecting means for detecting, after a predetermined time has elapsed since an output of said photocoupler is produced to turn on said semiconductor device, the presence of the output of said photocoupler; second detecting means, serially connected with said first detecting means, for detecting a current flowing through said serial circuit so as to detect an overcurrent through said semiconductor device; a diode; and a variable voltage source, having a terminal which is connected to the bases of said output transistors via said diode, for gradually reducing a voltage of said variable voltage source itself while said first and second detecting means simultaneously detect the presence of the output of said photocoupler and the overcurrent through said semiconductor device, and for inducing said semiconductor device to an off state with the decline of said voltage, wherein a detecting level of said second detecting means can be set independently of the predetermined time associated with said first detecting means.

Claim 3

A drive circuit for a voltage driven type semiconductor device as claimed in claim 1, further comprising a diode connected between said control terminal of said semiconductor device and said variable voltage source so as to shunt a displacement current produced by an overcurrent through said semiconductor device.

Claim 4

A drive circuit for a voltage driven type semiconductor device as claimed in claim 1, further comprising a transistor which is induced to turn on by the voltage decline of said variable voltage source so as to provide a current path between said control terminal and said first main terminal of said semiconductor device to shunt a displacement current produced by an overcurrent through to said semiconductor device.

Claim 5

A drive circuit for a voltage driven type semiconductor device as claimed in claim 1, further comprising means for shortcircuiting said output of said photocoupler so as to hold said semiconductor device in an on state after detection by said first and second detecting means.

Claim 6

A drive circuit for a voltage driven type semiconductor device as claimed in claim 1, further comprising means for shortcircuiting said output of said photocoupler so as to hold said semiconductor device in an on state based on detection by said first and second detecting means for a predetermined period after said signal changes.

Claim 7

A drive circuit for a voltage driven type semiconductor as claimed in claim 1, wherein said first detecting means comprises a resistor connected to an output of said photocoupler, a capacitor connected to another output of said photocoupler, said capacitor additionally being connected to said resistor at an intermediate connection point, and a first detection transistor having a base that is connected to the intermediate connection point, and wherein said second detecting means comprises a second detection transistor connected in series with said first detection transmitter.

Claim 8

A drive circuit for controlling a semiconductor device in response to a PWM drive signal from a control circuit, the semiconductor device having a gate terminal and first and second main terminals, comprising: a first output transistor having a base terminal and first and second main terminals; a second output transistor having a base terminal and first and second main terminals, the base terminal of the second output transistor being connected to the base terminal of the first output transistor and the second main terminal of the second output transistor being connected to the second main terminal of the first output transistor; means for electrically connecting the second main terminals of the first and second output transistors to the gate terminal of the semiconductor device; an on-gate voltage source connected between the first main terminal of the semiconductor device and the first main terminal of the first output transistor; an off-gate voltage source connected between the first main terminal of the semiconductor device and the first main terminal of the second output transistor; input means, connected to the base terminals of the output transistors, for receiving the drive signal and for generating an input signal for the output transistors in response to the drive signal, the input signal having a first digital state or a second digital state; a resistor and a capacitor connected in series between the first main terminal of the first output transistor and the first main terminal of the second output transistor, the resistor and capacitor being connected to one another at an intermediate connection point; means for electrically connecting the intermediate connection point to the bases of the output transistors; first detecting means for detecting the first digital state of the input signal a predetermined time after a transition from the second digital state to the first digital state, the first detecting means including a third transistor having a main current path; second detecting means for detecting an overcurrent through the semiconductor device, the second detecting means including a fourth transistor having a main current path; and means for connecting the main current path of the third transistor and the main current path of the fourth transistor in a series circuit across the intermediate connection point and the first main terminal of the second output transistor.

Claim 9

A drive circuit for controlling a semiconductor device in response to a PWM drive signal from a control circuit, the semiconductor device having a gate terminal and first and second main terminals, comprising: a first output transistor having a base terminal and first and second main terminals; a second output transistor having a base terminal and first and second main terminals, the base terminal of the second output transistor being connected to the base terminal of the first output transistor and the second main terminal of the second output transistor being connected to the second main terminal of the first output transistor; means for electrically connecting the second main terminals of the first and second output transistors to the gate terminal of the semiconductor device; an on-gate voltage source connected between the first main terminal of the semiconductor device and the first main terminal of the first output transistor; an off-gate voltage source connected between the first main terminal of the semiconductor device and the first main terminal of the second output transistor; input means, connected to the base terminals of the output transistors, for receiving the drive signal and for generating an input signal for the output transistors in response to the drive signal, the input signal having a first digital state or a second digital state; a resistor and a capacitor connected in series between the first main terminal of the first output transistor and the first main terminal of the second output transistor, the resistor and capacitor being connected to one another at an intermediate connection point; means for electrically connecting the intermediate connection point to the bases of the output transistors; first detecting means for detecting the first digital state of the input signal a predetermined time after a transition from the second digital state to the first digital state, the first detecting means including a third transistor having a main current path; second detecting means for detecting an overcurrent through the semiconductor device, the second detecting means including a fourth transistor having a main current path; and means for connecting the main current path of the third transistor and the main current path of the fourth transistor in a series circuit across the intermediate connection point and the first main terminal of the second output transistor.

Claim 10

The drive circuit of claim 7, wherein the means for connecting the main current path of the third transistor and the main current path of the fourth transistor in a series circuit comprises a resistor in series with the main current paths of the third and fourth transistors.

Claim 11

The drive circuit of claim 7, wherein the means for electrically connecting the second main terminals of the first and second output transistors to the gate terminal of the semiconductor device comprises a resistor.

Claim 12

The drive circuit of claim 8, wherein the means for electrically connecting the intermediate connection point to the bases of the output transistors comprises a diode.

Claim 13

The drive circuit of claim 7, wherein the fourth transistor additionally has a base terminal, and wherein the second detecting means additionally includes a series circuit connecting the second main terminal of the semiconductor device to the first main terminal of the second output transistor, the base terminal of the fourth transistor being connected to the series circuit.

Claim 14

The drive circuit of claim 11, wherein the fourth transistor detects current through the series circuit.

Claim 15

The drive circuit of claim 11, wherein the series circuit comprises a resistor and a Zener diode.

Claim 16

The drive circuit of claim 7, wherein the input means comprises a photocoupler which receives the drive signal, and means for inverting an output signal from the photocoupler to generate the input signal for the output transistors.

Claim 17

The drive circuit of claim 7, further comprising a diode connecting the gate terminal of the semiconductor device to the intermediate connection point.

Claim 18

The drive circuit of claim 7, further comprising another transistor having a base terminal which is connected to the intermediate connection point and having a main current path which is connected between the gate terminal of the semiconductor device and the first main terminal of the second output transistor.

Claim 19

The drive circuit of claim 7, further comprising an additional transistor having a base terminal which is connected to the series circuit across the intermediate connection point and the first main terminal of the second output transistor and having a first main terminal which is connected to the first main terminal of the second output transistor.

Claim 20

The drive circuit of claim 17, wherein the additional transistor additionally has a second main terminal that is connected to the input means.

Claim 21

The drive circuit of claim 17, wherein the additional transistor additionally has a second main terminal, and further comprising a capacitor connecting the second main terminal of the additional transistor to the input means, and a diode and a resistor connected in series between the second main terminal of the additional transistor and the first main terminal of the second output transistor.

Claim 22

The drive circuit of claim 7, wherein the means for connecting the main current path of the third transistor and the main current path of the fourth transistor in a series circuit comprises a photodiode in series with the main current paths of the third and fourth transistors, and further comprising a first phototransistor connected to the input means, the first phototransistor being optically exposed to the photodiode.

Claim 23

The drive circuit of claim 20, wherein the input means comprises a photocoupler having a second phototransistor that is connected to the first phototransistor.