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US5200652A
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Programmable/reprogrammable structure combining both antifuse and fuse elements
Assignee: Micron Technology Inc
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Filing: 1991-11-13
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Granted: 1993-04-06
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Expires: 2011-11-13
Abstract
Abstract The present invention comprises a programmable structure for a integrated circuits, such as programmable read-only memory (PROM) or option selections/redundancy repair on dynamic random access memories (DRAMs), which utilizes both antifuse and fuse elements for multiple programming. Various combinations of anti-fuse and fuse elements (series or series-parallel combinations) will allow multiple programming of a given node in a particular circuit design to allow greater programming flexibility.
Inventors
- 👤 Roger R. Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 01:17
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/1733; G; G11; G11C; G11C17/00; G11C17/14; G11C17/16
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
76 words
A programmable/reprogrammable structure in an integrated circuit comprising: first and second conductors; and a combination of one-time programmable elements coupled therebetween; wherein said one-time programmable elements comprise an antifuse element coupled in series to a first fuse element via a third conductor thereby forming an antifuse/fuse series combination and a second fuse element coupled in parallel to said series combination, thereby providing a programming sequence having an initial state and first, second and third programmable states.
Claim 2
Dependent Claim
76 words
A programmable/reprogrammable structure in an integrated circuit comprising: first and second conductors; and a combination of one-time programmable elements coupled therebetween; wherein said one-time programmable elements comprise an antifuse element coupled in series to a first fuse element via a third conductor thereby forming an antifuse/fuse series combination and a second fuse element coupled in parallel to said series combination, thereby providing a programming sequence having an initial state and first, second and third programmable states.
Claim 3
Dependent Claim
77 words
A programmable/reprogrammable structure in an integrated circuit comprising: first and second conductors; and a combination of one-time programmable elements coupled therebetween; wherein said one-time programmable elements comprise a first antifuse element coupled in series to a first fuse element via a third conductor thereby forming an antifuse/fuse series combination and a second antifuse element coupled in parallel to said series combination, thereby providing a programming sequence having an initial state and first, second and third programmable states.
Claim 4
Dependent Claim
77 words
A programmable/reprogrammable structure in an integrated circuit comprising: first and second conductors; and a combination of one-time programmable elements coupled therebetween; wherein said one-time programmable elements comprise a first antifuse element coupled in series to a first fuse element via a third conductor thereby forming an antifuse/fuse series combination and a second antifuse element coupled in parallel to said series combination, thereby providing a programming sequence having an initial state and first, second and third programmable states.
Claim 5
Dependent Claim
28 words
The programmable/reprogrammable structure of claim 1 wherein said programming sequence comprises a first shorted state, a first open state, a second shorted state and a second open state.
Claim 6
Dependent Claim
27 words
The programmable/reprogrammable structure of claim 1 wherein said first antifuse element is programmed as a short by applying a voltage potential between said first and third conductors.
Claim 7
Dependent Claim
26 words
The programmable/reprogrammable structure of claim 1 wherein said fuse element is programmed as an open by applying a voltage potential between said second and third conductors.
Claim 8
Dependent Claim
27 words
The programmable/reprogrammable structure of claim 1 wherein said second fuse element is programmed as an open by applying a voltage potential between said first and second conductors.
Claim 9
Dependent Claim
28 words
The programmable/reprogrammable structure of claim 2 wherein said programming sequence comprises a first open state, a first shorted state, a second open state and a second shorted state.
Claim 10
Dependent Claim
27 words
The programmable/reprogrammable structure of claim 2 wherein said first antifuse element is programmed as a short by applying a voltage potential between said first and third conductors.
Claim 11
Dependent Claim
26 words
The programmable/reprogrammable structure of claim 2 wherein said fuse element is programmed as an open by applying a voltage potential between said second and third conductors.
Claim 12
Dependent Claim
27 words
The programmable/reprogrammable structure of claim 2 wherein said second antifuse element is programmed as a short by applying a voltage potential between said first and second conductors.
Claim 13
Dependent Claim
14 words
The programmable/reprogrammable structure of claim 1 wherein said integrated circuit comprises a memory device.
Claim 14
Dependent Claim
16 words
The integrated circuit of claim 11 wherein said memory device comprises a programmable read only memory.
Claim 15
Dependent Claim
15 words
The integrated circuit of claim 11 wherein said memory device comprises a random access memory.
Claim 16
Dependent Claim
15 words
The integrated circuit of claim 11 wherein said memory device comprises a programmable logic array.
Claim 17
Dependent Claim
14 words
The integrated circuit of claim 11 wherein said memory device comprises programmable array logic.
Claim 18
Dependent Claim
14 words
The programmable/reprogrammable structure of claim 2 wherein said integrated circuit comprises a memory device.
Claim 19
Dependent Claim
16 words
The integrated circuit of claim 16 wherein said memory device comprises a programmable read only memory.
Claim 20
Dependent Claim
15 words
The integrated circuit of claim 16 wherein said memory device comprises a random access memory.
Claim 21
Dependent Claim
15 words
The integrated circuit of claim 16 wherein said memory device comprises a programmable logic array.
Claim 22
Dependent Claim
14 words
The integrated circuit of claim 16 wherein said memory device comprises programmable array logic.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-04-05 | 1996-10-05 | 1997-04-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-04-05 | 2000-10-05 | 2001-04-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-04-05 | 2004-10-05 | 2005-04-06 | $7700.00 | Window Closed / Lapsed |