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US5200364A Expired / Lapsed US ⏱️ 0.0 years remaining

Packaged integrated circuit with encapsulated electronic devices

Assignee: Texas Instruments Inc
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Filing: 1992-01-21
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Granted: 1993-04-06
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Expires: 2012-01-21
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Abstract

Abstract An integrated circuit device is disclosed. The device includes a first leadframe power supply bus and a second leadframe power supply bus that each have portions separate from and adjacent to one another that lie between a first plurality of leadfingers and a second plurality of leadfingers. An electronic device is connected to the first leadframe power supply bus and to the second leadframe power supply bus. Another electronic device can be connected to the first leadframe power supply bus and to the second leadframe bus. Exemplary of the electronic devices are a de-coupling capacitor and a capacitor for high frequency noise suppression. A semiconductor die is attached to the power supply busses. A substance encapsulates the components so that an integrated semiconductor chip is formed. A method of making an integrated circuit device is also disclosed.

Inventors

  • 👤 Wah K. Loh

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 11:21
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/411; H10W70/415; H10W70/421; H10W70/475; H10W72/00; H10W72/071; H10W72/073; H10W72/50; H10W72/59; H10W72/851; H10W72/853; H10W72/865; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W72/941; H10W72/944; H10W72/9445; H10W90/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756; Y; Y10; Y10S; Y10S257/00; Y10S257/924; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 93 words
A method of making an integrated circuit package, the method comprising the steps of: attaching a first electronic device to the top of and between two adjacent power supply busses of a leadframe; attaching a second electronic device to the top of and between the two adjacent power supply busses of the leadframe; attaching a semiconductor device to the bottom of the leadframe; and encapsulating with an encapsulant the leadframe, the first and second electronic devices, and the semiconductor device to thereby form an integrated circuit package with leadfingers extending from the encapsulant.
Claim 2
Independent Claim 93 words
A method of making an integrated circuit package, the method comprising the steps of: attaching a first electronic device to the top of and between two adjacent power supply busses of a leadframe; attaching a second electronic device to the top of and between the two adjacent power supply busses of the leadframe; attaching a semiconductor device to the bottom of the leadframe; and encapsulating with an encapsulant the leadframe, the first and second electronic devices, and the semiconductor device to thereby form an integrated circuit package with leadfingers extending from the encapsulant.
Claim 3
Dependent Claim 43 words
A method of making an integrated circuit package, in accordance with claim 1, wherein the step of attaching the semiconductor device includes connecting wire bonds between bond pads located on the semiconductor device near the center of the semiconductor device and the leadframe.

References Cited (Backward Citations)

US4410905A Cited
US4862245A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-04-05 1996-10-05 1997-04-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-04-05 2000-10-05 2001-04-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-04-05 2004-10-05 2005-04-06 $7700.00 Window Closed / Lapsed

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