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US5197146A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for maintaining cache coherence in a multiprocessor computer system

Assignee: HP Inc
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Filing: 1989-06-21
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Granted: 1993-03-23
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Expires: 2009-06-21
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Abstract

Abstract A method is provided for maintaining cache coherence in a multiprocessor computer system having a potential for duplication of data in a plurality of storage location, where there is cache associated with each processor by storing a processor address and a "hint" or for each cache. More specifically, where the multiprocessor computer system employs doubly-linked lists for identifying a previous master of sharable data and a next master of the sharable data, the method includes the steps of passing the current address of the current master from the current master to the previous master; passing the current address of the current master from the current master to the next master; passing the current index of the current master from the current master to the previous master (the current index being a collection of all information needed by the current master to find a coherence block); and passing the current index of the current master from the current master to the next master.

Inventors

  • 👤 Ross V. LaFetra

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 11:29
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0806; G06F12/0815; G06F12/0817; G06F12/0824

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 156 words
A method for maintaining cache coherence in a multiprocessor computer system having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system employing double-linked lists for identifying a previous master of said data and a next master of said data, said method comprising the steps of: passing a current address of a current master from the current master to the previous master, wherein the current address is the location to which the current master will respond; passing the current address of the current master from the current master to the next master; passing a current index of the current master from the current master to the previous master, wherein the current index is a collection of information needed by the current master to use one of the coherence blocks; and passing the current index of the current master from the current master to the next master.
Claim 2
Independent Claim 156 words
A method for maintaining cache coherence in a multiprocessor computer system having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system employing double-linked lists for identifying a previous master of said data and a next master of said data, said method comprising the steps of: passing a current address of a current master from the current master to the previous master, wherein the current address is the location to which the current master will respond; passing the current address of the current master from the current master to the next master; passing a current index of the current master from the current master to the previous master, wherein the current index is a collection of information needed by the current master to use one of the coherence blocks; and passing the current index of the current master from the current master to the next master.
Claim 3
Dependent Claim 22 words
The method according to claim 1 wherein the current address and the current index are passed simultaneously as part of a transaction.
Claim 4
Dependent Claim 44 words
The method according to claim 1 wherein said plurality of storage locations include one central memory system for containing a valid copy of all data and at least two cache memories, each one of said cache memories being coupled to its own associated processor.
Claim 5
Dependent Claim 77 words
The method according to claim 3 wherein each cache memory stores at least a portion of said coherence blocks, each of the coherence blocks having associated therewith a first tag indicative of the presence of valid data or invalid data, and wherein each cache memory includes a slot for storing said current address and the current index of the previous master, and a slot for storing said current address and the current index of the next master.
Claim 6
Independent Claim 342 words
A method for maintaining cache coherence in a multiprocessor computer system having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system employing doubly-linked lists for identifying a previous master of said data and a next master of said data, said method comprising the steps of: a) issuing from a first master to a second master a first transaction requesting sharable data in a coherence block of said second master, said second master being a repository of known valid data, said first transaction including at least an address of a requested coherence block, a first master address for said first master and a first index which identifies a storage location within the first master; b) storing a second master address of said second master and a second index of said second master in a previous master storage location of said first master, thereby to indicate a previous link of said first master; thereafter c) issuing from said second master to said first master a second transaction containing at least a portion of the sharable data and at least a third master address and a third index of a third master from a next master storage location of said second mater; thereafter d) storing said first master address and said first index in said next master storage location of said second master, thereby to indicate a next link of said second master; e) storing said third master address and said third index in a next master storage location of said first master, thereby to indicate a next link of said first master; thereafter f) issuing from said first master to said third master a third transaction containing said first master address and said first index; g) storing said first master address and said first index in a previous master storage location of said third master thereby to indicate a previous link of said third master; and h) updating previous master addresses and indexes and next master addresses and indexes in selected linked masters.
Claim 7
Independent Claim 342 words
A method for maintaining cache coherence in a multiprocessor computer system having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system employing doubly-linked lists for identifying a previous master of said data and a next master of said data, said method comprising the steps of: a) issuing from a first master to a second master a first transaction requesting sharable data in a coherence block of said second master, said second master being a repository of known valid data, said first transaction including at least an address of a requested coherence block, a first master address for said first master and a first index which identifies a storage location within the first master; b) storing a second master address of said second master and a second index of said second master in a previous master storage location of said first master, thereby to indicate a previous link of said first master; thereafter c) issuing from said second master to said first master a second transaction containing at least a portion of the sharable data and at least a third master address and a third index of a third master from a next master storage location of said second mater; thereafter d) storing said first master address and said first index in said next master storage location of said second master, thereby to indicate a next link of said second master; e) storing said third master address and said third index in a next master storage location of said first master, thereby to indicate a next link of said first master; thereafter f) issuing from said first master to said third master a third transaction containing said first master address and said first index; g) storing said first master address and said first index in a previous master storage location of said third master thereby to indicate a previous link of said third master; and h) updating previous master addresses and indexes and next master addresses and indexes in selected linked masters.
Claim 8
Dependent Claim 27 words
The method according to claim 5 further inducing the step of tagging each master as containing valid data upon completion of said updating of addresses and indexes.
Claim 9
Dependent Claim 31 words
The method of claim 5 wherein said updating step h) includes acknowledging from said third master to said first master completion of the request of said first master for sharable data.
Claim 10
Dependent Claim 39 words
The method according to claim 5 wherein said third master is said second master such that said step g) comprises storing said first master address and said first index in a previous master storage location of said second master.
Claim 11
Independent Claim 311 words
A method for maintaining cache coherence in a multiprocessor computer system having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system employing doubly-linked lists for identifying a previous master of said data and a next master of said data, wherein a second master address and a second index are stored in a next master storage location of a second master, said method comprising the steps of: a) issuing from a first master to said second master a first transaction requesting sharable data in a coherence block of said second master, said second master being a repository of known valid data, said first transaction including at least an address of a requested coherence block, a first master address for said first master and a first index which identifies a data storage location within the first master; b) storing said second master address of said second master and said second index of said second master in a previous master storage location of said first master, thereby to indicate a previous link of said first master; thereafter c) issuing from said second master to said first master a second transaction containing at least a portion of the sharable data and at least said second master address and said second index from the next master storage location of said second master; thereafter d) storing said first master address and said first index in said next master storage location of said second master, thereby to indicate a next link of said second master; e) storing said second master address and said second index in a next master storage location of said first master, thereby to indicate a next link of said first master; and thereafter f) updating previous master addresses and indexes and next master addresses and indexes in selected linked masters to correct pointers.
Claim 12
Independent Claim 311 words
A method for maintaining cache coherence in a multiprocessor computer system having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system employing doubly-linked lists for identifying a previous master of said data and a next master of said data, wherein a second master address and a second index are stored in a next master storage location of a second master, said method comprising the steps of: a) issuing from a first master to said second master a first transaction requesting sharable data in a coherence block of said second master, said second master being a repository of known valid data, said first transaction including at least an address of a requested coherence block, a first master address for said first master and a first index which identifies a data storage location within the first master; b) storing said second master address of said second master and said second index of said second master in a previous master storage location of said first master, thereby to indicate a previous link of said first master; thereafter c) issuing from said second master to said first master a second transaction containing at least a portion of the sharable data and at least said second master address and said second index from the next master storage location of said second master; thereafter d) storing said first master address and said first index in said next master storage location of said second master, thereby to indicate a next link of said second master; e) storing said second master address and said second index in a next master storage location of said first master, thereby to indicate a next link of said first master; and thereafter f) updating previous master addresses and indexes and next master addresses and indexes in selected linked masters to correct pointers.
Claim 13
Dependent Claim 27 words
The method according to claim 9 further including the step of tagging each master as containing valid data upon completion of said updating of addresses and indexes.
Claim 14
Independent Claim 231 words
A method for maintaining cache coherence in a multiprocessor computer system having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system employing doubly-linked lists for identifying a previous master of said data and a next master of said data, said method comprising the steps of: a) issuing from a first master to a second master a first transaction requesting a purge of sharable data in a coherence block of the first master, said first transaction including a third master address for a third master and a third index which identifies a data storage location within the third master; thereafter b) storing said third master address and third index in a next master storage location of said second master, thereby to indicate a next link of said second master; c) issuing from said second master to said third master a second transaction, said second transaction containing a second master address and a second index of said second master; thereafter d) issuing from said third mast to said first master a third transaction acknowledging completion of said first transaction; thereafter e) storing said second master address and said second index in a previous master storage location of said third master, thereby to indicate a previous link of said third master; and f) marking said coherence block of said first master as invalid.
Claim 15
Independent Claim 231 words
A method for maintaining cache coherence in a multiprocessor computer system having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system employing doubly-linked lists for identifying a previous master of said data and a next master of said data, said method comprising the steps of: a) issuing from a first master to a second master a first transaction requesting a purge of sharable data in a coherence block of the first master, said first transaction including a third master address for a third master and a third index which identifies a data storage location within the third master; thereafter b) storing said third master address and third index in a next master storage location of said second master, thereby to indicate a next link of said second master; c) issuing from said second master to said third master a second transaction, said second transaction containing a second master address and a second index of said second master; thereafter d) issuing from said third mast to said first master a third transaction acknowledging completion of said first transaction; thereafter e) storing said second master address and said second index in a previous master storage location of said third master, thereby to indicate a previous link of said third master; and f) marking said coherence block of said first master as invalid.
Claim 16
Dependent Claim 69 words
The method according to claim 11 wherein said third master is said second master such that said step b) comprises storing said second master address and said second index in a next master storage location of said second master and step c) comprises issuing a second transaction from said second master to itself, said second transaction containing a second master address and a second index of said second master.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-03-22 1996-09-21 1997-03-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-03-22 2000-09-21 2001-03-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-03-22 2004-09-21 2005-03-23 $7700.00 Window Closed / Lapsed

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