Modified field isolation process with no channel-stop implant encroachment

Claim 1

A method for fabricating semiconductor devices having field oxide isolation structures with a channel stop comprising: providing a semiconductor substrate; forming a multilayer oxidation masking structure of a silicon oxide layer, a polycrystalline silicon layer and a silicon nitride layer; patterning said multilayer oxidation mask by removing the said silicon nitride layer and a portion of the thickness of said polycrystalline silicon layer in the areas designated to have said field oxide isolation grown therein; wherein said polycrystalline silicon layer is between about 400 to 800 Angstroms in thickness and said patterning removes a portion of said layer to leave between about 200 to 400 Angstroms of said polycrystalline silicon layer; forming a sidewall structure on the exposed sidewalls of the patterned oxidation mask by deposition of a uniformly thick, nonconductive layer over the patterned mask and anisotropically etching said uniformly thick layer, wherein the remaining thickness of said polycrystalline silicon is sufficient enough to prevent etching and undercutting into said silicon oxide layer during the formation of said sidewall structure and thin enough to not have a significant adverse effect on the subsequently formed said field oxide isolation structure; implanting impurities into the said area designated to have said field oxide isolation to form said channel stop; removing said sidewall structure; and growing said field oxide isolation structure by subjecting the structure to oxidation whereby the said channel stop is confined under the said field oxide isolation and not encroaching the planned device regions.

Claim 2

A method for fabricating semiconductor devices having field oxide isolation structures with a channel stop comprising: providing a semiconductor substrate; forming a multilayer oxidation masking structure of a silicon oxide layer, a polycrystalline silicon layer and a silicon nitride layer; patterning said multilayer oxidation mask by removing the said silicon nitride layer and a portion of the thickness of said polycrystalline silicon layer in the areas designated to have said field oxide isolation grown therein; wherein said polycrystalline silicon layer is between about 400 to 800 Angstroms in thickness and said patterning removes a portion of said layer to leave between about 200 to 400 Angstroms of said polycrystalline silicon layer; forming a sidewall structure on the exposed sidewalls of the patterned oxidation mask by deposition of a uniformly thick, nonconductive layer over the patterned mask and anisotropically etching said uniformly thick layer, wherein the remaining thickness of said polycrystalline silicon is sufficient enough to prevent etching and undercutting into said silicon oxide layer during the formation of said sidewall structure and thin enough to not have a significant adverse effect on the subsequently formed said field oxide isolation structure; implanting impurities into the said area designated to have said field oxide isolation to form said channel stop; removing said sidewall structure; and growing said field oxide isolation structure by subjecting the structure to oxidation whereby the said channel stop is confined under the said field oxide isolation and not encroaching the planned device regions.

Claim 11

A device isolation method for isolating field effect semiconductor devices having field oxide isolation structures with a channel stop comprising: providing a semiconductor substrate; forming a multilayer oxidation masking structure of a silicon oxide layer, a polycrystalline silicon layer and a silicon nitride layer; patterning said multilayer oxidation mask by removing the said silicon nitride layer and a portion of said polycrystalline silicon layer in the areas designated to have said field oxide isolation grown therein; wherein said polycrystalline silicon layer is between about 400 to 800 Angstroms in thickness and said patterning removes a portion of said layer to leave between about 200 to 400 Angstroms of said polycrystalline silicon layer; forming a sidewall structure on the exposed sidewalls of the patterned oxidation mask by deposition of a uniformly thick, nonconductive layer over the patterned mask and anisotropically etching said uniformly thick layer, wherein the remaining thickness of said polycrystalline silicon is sufficient enough to prevent etching and undercutting into said silicon oxide layer during the formation of said sidewall structure and thin enough to not have a significant adverse effect on the subsequently formed said field oxide isolation structure; implanting impurities into the said area designated to have said field oxide isolation to form said channel stop; removing said sidewall structure; growing said field oxide insulator structure by subjecting the structure to oxidation whereby the said channel stop is confined under the said field oxide isolation and not encroaching the planned device regions; removing the remaining said multilayer oxidation mask; and forming field effect semiconductor devices between and on the semiconductor device regions within the said field oxide isolation.

Claim 12

A device isolation method for isolating field effect semiconductor devices having field oxide isolation structures with a channel stop comprising: providing a semiconductor substrate; forming a multilayer oxidation masking structure of a silicon oxide layer, a polycrystalline silicon layer and a silicon nitride layer; patterning said multilayer oxidation mask by removing the said silicon nitride layer and a portion of said polycrystalline silicon layer in the areas designated to have said field oxide isolation grown therein; wherein said polycrystalline silicon layer is between about 400 to 800 Angstroms in thickness and said patterning removes a portion of said layer to leave between about 200 to 400 Angstroms of said polycrystalline silicon layer; forming a sidewall structure on the exposed sidewalls of the patterned oxidation mask by deposition of a uniformly thick, nonconductive layer over the patterned mask and anisotropically etching said uniformly thick layer, wherein the remaining thickness of said polycrystalline silicon is sufficient enough to prevent etching and undercutting into said silicon oxide layer during the formation of said sidewall structure and thin enough to not have a significant adverse effect on the subsequently formed said field oxide isolation structure; implanting impurities into the said area designated to have said field oxide isolation to form said channel stop; removing said sidewall structure; growing said field oxide insulator structure by subjecting the structure to oxidation whereby the said channel stop is confined under the said field oxide isolation and not encroaching the planned device regions; removing the remaining said multilayer oxidation mask; and forming field effect semiconductor devices between and on the semiconductor device regions within the said field oxide isolation.