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US5189589A Expired / Lapsed US ⏱️ 0.0 years remaining

Power controller

Assignee: Bodenseewerk Geratetechnik GmbH
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Filing: 1990-02-07
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Granted: 1993-02-23
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Expires: 2010-02-07
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Abstract

Abstract To establish an inexpensive, and universally applicable power controller for the monitored activation, monitoring and protection of current-consuming loads by a microprocessor having low-power control outputs, the following circuit elements are implemented in an integrated device: an activation path (12) disconnectable by an electronic switch (18) and to which a C-MOS/TTL-signal is adapted to be applied by a microprocessor output port and which generates a MOS-FET control signal; a latch (20) which is arranged to control said electronic switch (18) and which, for its part, is adapted to be controled by external C-MOS/TTL-signals such that the switch (18) opens with a first signal and closes with a second signal; a current comparator (40) offering a first and a second switching threshold adapted to be determined by external components and a third fixed internal switching threshold and to which the load current is adapted to be applied common mode rejected and which are arranged to control the latch (20) to open the electronic switch (18) with a delay determined by external components (54,56) when the second (42) lower switching threshold of the current comparator (40) is exceeded, and undelayed when the third higher switching threshold of the current comparator (40) is exceeded; a status indicator (72) for the latch (20) for indication of the state "overcurrent"; a load voltage measuring path (68) having a signal output (70) which is arranged to signal load voltage within tolerance; a first load current measuring path, the load current input (34,36) of which is connected to the current comparator (40) having, a signal output (48) which is arranged to signalize the load current within tolerance; a second load current measuring path (60) having an analog voltage output (62,64) adapted to be calibrated according to the current and to be applied to an A/D-converter (100) of a microprocessor (90); a reset circuit (112) which definedly sets the latch (20) when the device (10) is powered; and a test circuit (86,96) which is arranged to be supplied by analog input voltages from a D/A-converter of the microprocessor (90) connected to the current measuring paths (40) for simulation of load currents.

Inventors

  • 👤 Klaus W. Marschall

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 16:26
CPC Classifications
H; H02; H02H; H02H3/00; H02H3/08; H02H3/02; H02H3/04; H02H3/044

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 385 words
Power controller for the monitored activation, monitoring and protection of current-consuming loads in a load circuit by a microprocessor having low-power control outputs, characterized in that the following circuit elements are integrated in an integrated device: (a) an activation path (12) disconnectable by an electronic switch (18) and to which either a CMOS or TTL signal is adapted to be applied by a microprocessor output port and which generates a MOS-FET control signal, (b) a latch (20) which is arranged to control said electronic switch (18) and which, for its part, is adapted to be controlled by external either CMOS or TTL level signals such that the switch (18) opens with a first signal and closes with a second signal, (c) a current comparator (40) offering a first and a second switching threshold adapted to be determined by external components and a third fixed internal switching threshold, and to which the load current is adapted to be applied common mode rejected and which are arranged to control the latch (20) to open the electronic switch (18) with a delay determined by external components (54,56) when the second lower switching threshold of the current comparator (40) is exceeded, and undelayed when the third higher switching threshold of the current comparator (40) is exceeded, (d) a status indicator (72) for the latch (20) which indicates when the power controller detects a state of overcurrent, (e) a load voltage measuring path (68) having a signal output (70) which is indicative of whether a load voltage is within a predetermined tolerance, (f) a first load current measuring path, the load current input (34,36) of which is connected to the current comparator (40), having a signal output (48) which is indicative at whether the load current is within a predetermined tolerance, (g) a second load current measuring path (60) having an analog voltage output (62,64) adapted to be calibrated according to the current and to be applied to an A/D-converter (100) of a microprocessor (90), (h) a reset circuit (112) which sets the latch (20) to a well-defined state when the device (10) is powered, and (i) a test circuit (86,96) which is arranged to be supplied by analog input voltages form the D/A-converter of the microprocessor (90) connected to the current measuring paths (40) for simulation of load currents.
Claim 2
Dependent Claim 385 words
Power controller for the monitored activation, monitoring and protection of current-consuming loads in a load circuit by a microprocessor having low-power control outputs, characterized in that the following circuit elements are integrated in an integrated device: (a) an activation path (12) disconnectable by an electronic switch (18) and to which either a CMOS or TTL signal is adapted to be applied by a microprocessor output port and which generates a MOS-FET control signal, (b) a latch (20) which is arranged to control said electronic switch (18) and which, for its part, is adapted to be controlled by external either CMOS or TTL level signals such that the switch (18) opens with a first signal and closes with a second signal, (c) a current comparator (40) offering a first and a second switching threshold adapted to be determined by external components and a third fixed internal switching threshold, and to which the load current is adapted to be applied common mode rejected and which are arranged to control the latch (20) to open the electronic switch (18) with a delay determined by external components (54,56) when the second lower switching threshold of the current comparator (40) is exceeded, and undelayed when the third higher switching threshold of the current comparator (40) is exceeded, (d) a status indicator (72) for the latch (20) which indicates when the power controller detects a state of overcurrent, (e) a load voltage measuring path (68) having a signal output (70) which is indicative of whether a load voltage is within a predetermined tolerance, (f) a first load current measuring path, the load current input (34,36) of which is connected to the current comparator (40), having a signal output (48) which is indicative at whether the load current is within a predetermined tolerance, (g) a second load current measuring path (60) having an analog voltage output (62,64) adapted to be calibrated according to the current and to be applied to an A/D-converter (100) of a microprocessor (90), (h) a reset circuit (112) which sets the latch (20) to a well-defined state when the device (10) is powered, and (i) a test circuit (86,96) which is arranged to be supplied by analog input voltages form the D/A-converter of the microprocessor (90) connected to the current measuring paths (40) for simulation of load currents.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-02-23 1996-08-24 1997-02-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-02-23 2000-08-24 2001-02-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-02-23 2004-08-24 2005-02-23 $7700.00 Window Closed / Lapsed

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