Rule structure in a procedure for synthesis of logic circuits

Claim 1

A procedure implemented by a data processing system for execution of rules stored in a memory in said system related to model structures used in automated synthesis of logic circuits, the procedure comprising the steps, performed by the data processing system, of: relating, by the data processing system, at least one rule to said model structure by means of data base pointers; executing, by the data processing system, a first portion of each related rule to determine if a first condition is present; prioritizing, by the data processing system, the related rules in which the first condition is present such that the rules are associated with different priorities; selecting, by the data processing system, one of said related rules, according to the priority associated with each of said related rules, when a plurality of rules determines that said first condition is present; and implementing, by the data processing system, a second portion of said selected rule to perform said logic circuit synthesis.

Claim 3

A method for automatic synthesis of a logic circuit formed of circuit components that are to be interconnected in a desired manner, the circuit components being represented by model instances, the method being implemented by a data processing system having a memory for storing a database corresponding to the logic circuit being synthesized, the method comprising the steps, performed by the data processing system, of: storing, by the data processing system, in the memory data corresponding to (1) the model instances, (2) sets of predetermined rules associated with each model instance, each rule including an antecedent portion and a consequence portion, and (3) the desired interconnections; testing, by the data processing system, for each model instance and its placement in the logic circuit according to the desired interconnections, the antecedent portion of the rule associated therewith; prioritizing, by the data processing system, the rules whose antecedent portions have been found to be true by the testing step; executing, by the data processing system, according to priority as determined by the prioritizing step, the consequence portion of each rule whose antecedent portion is found to be true by the testing step; and modifying, by the data processing system, in accordance with the execution of the consequence portion in the executing step, the database in the memory that is descriptive of the logic circuit to perform synthesis of the logic circuit.

Claim 4

A method for automatic synthesis of a logic circuit formed of circuit components that are to be interconnected in a desired manner, the circuit components being represented by model instances, the method being implemented by a data processing system having a memory for storing a database corresponding to the logic circuit being synthesized, the method comprising the steps, performed by the data processing system, of: storing, by the data processing system, in the memory data corresponding to (1) the model instances, (2) sets of predetermined rules associated with each model instance, each rule including an antecedent portion and a consequence portion, and (3) the desired interconnections; testing, by the data processing system, for each model instance and its placement in the logic circuit according to the desired interconnections, the antecedent portion of the rule associated therewith; prioritizing, by the data processing system, the rules whose antecedent portions have been found to be true by the testing step; executing, by the data processing system, according to priority as determined by the prioritizing step, the consequence portion of each rule whose antecedent portion is found to be true by the testing step; and modifying, by the data processing system, in accordance with the execution of the consequence portion in the executing step, the database in the memory that is descriptive of the logic circuit to perform synthesis of the logic circuit.