Abstract An improvement for a semiconductor device in which memory elements and logic elements are formed on the same substrate is disclosed. The semiconductor device is formed so that a concentration of the field inversion preventive layer below the field oxide film within the region where memory elements are formed is higher than a concentration of the field inversion preventive layer below the field oxide film within the region where logic elements are formed. For the method of manufacturing a semiconductor substrate according to this invention which realizes such a structure, there is a method of allowing the concentrations of field inversion preventive layers within the memory element region and within the logic element region to be differently changed, respectively, and a method of first forming field inversion preventive layers within the both regions so that they have a low concentration, and implementing ion-implantation only to the memory element region for a second time under the state where the logic element region is covered with resist, to thus provide an inversion preventive layer of high concentration.
Inventors
👤 Katsuto Katoh
👤 Kiyomi Naruke
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-11-06 10:39
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/01
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
148 words
A semiconductor device including a plurality of logic elements and memory elements formed on the same substrate, said semiconductor device comprising: a region where said logic elements are formed, including a first field inversion preventive layer having a first impurity concentration below a first field oxide film for isolating one of said logic elements from neighboring logic elements; and a region where said memory elements are formed, including a second field inversion preventive layer below a second field oxide film for isolating one of said memory elements from neighboring memory elements, said second field inversion preventive layer having a second impurity concentration higher than said first impurity concentration at a portion which does not adjoin an active region which is a region surrounded by said second field oxide film, and having a third impurity concentration lower than said first impurity concentration at a portion adjoining said active region.
Claim 2
Dependent Claim
148 words
A semiconductor device including a plurality of logic elements and memory elements formed on the same substrate, said semiconductor device comprising: a region where said logic elements are formed, including a first field inversion preventive layer having a first impurity concentration below a first field oxide film for isolating one of said logic elements from neighboring logic elements; and a region where said memory elements are formed, including a second field inversion preventive layer below a second field oxide film for isolating one of said memory elements from neighboring memory elements, said second field inversion preventive layer having a second impurity concentration higher than said first impurity concentration at a portion which does not adjoin an active region which is a region surrounded by said second field oxide film, and having a third impurity concentration lower than said first impurity concentration at a portion adjoining said active region.