US5166770A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Silicided structures having openings therein
Assignee: Texas Instruments Inc
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Filing: 1987-04-15
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Granted: 1992-11-24
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Expires: 2007-04-15
Abstract
Abstract Preferred embodiments include silicon complementary MOSFETs with titanium silicided junctions (38, 58) and direct contacts of aluminum metallization (61, 62) to the p junctions (58) which avoids the high contact resistance of the silicide (60) to p silicon (58). Preferred embodiments also include silicided polysilicon lines without corresponding silicided MOSFET junctions.
Inventors
- 👤 Thomas E. Tang
- 👤 Che-Chia Wei
- 👤 Cheng-Eng D. Chen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:35
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4403; H10W20/4437; H10W20/4441
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
81 words
An integrated circuit, comprising: the substrate; insulating regions formed at the surface of said substrate; a layer of metal silicide formed on the surfaces of said substrate not covered by said insulating layer; a hole formed in selected portions of said metal silicide layer; and a conductive layer formed on the surface of said integrated circuit and patterned to provide selected conductors, said conductive layer extending to the surface of said substrate and contacting said substrate where said holes were formed.
Claim 2
Dependent Claim
81 words
An integrated circuit, comprising: the substrate; insulating regions formed at the surface of said substrate; a layer of metal silicide formed on the surfaces of said substrate not covered by said insulating layer; a hole formed in selected portions of said metal silicide layer; and a conductive layer formed on the surface of said integrated circuit and patterned to provide selected conductors, said conductive layer extending to the surface of said substrate and contacting said substrate where said holes were formed.
Claim 3
Dependent Claim
23 words
The integrated circuit of claim 1 wherein said metal silicide is selected from the group of titanium silicide, molybdenum silicide and tantalum silicide.
Claim 4
Dependent Claim
12 words
The integrated circuit of claim 1 wherein said conductive layer comprises aluminum.
Claim 5
Dependent Claim
13 words
The integrated circuit of claim 1 wherein said insulating areas comprise silicon dioxide.
Claim 6
Dependent Claim
22 words
The integrated circuit of claim 1 wherein said metal silicide layer is formed by reacting a layer of metal with said substrate.
Claim 7
Dependent Claim
19 words
The integrated circuit of claim 1 wherein said holes are formed above P+ doped contact regions in said substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-11-24 | 1996-05-25 | 1996-11-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-11-24 | 2000-05-25 | 2000-11-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-11-24 | 2004-05-25 | 2004-11-24 | $7700.00 | Window Closed / Lapsed |