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US5160409A Expired / Lapsed US ⏱️ 0.0 years remaining

Solder plate reflow method for forming a solder bump on a circuit trace intersection

Assignee: NXP USA Inc
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Filing: 1991-08-05
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Granted: 1992-11-03
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Expires: 2011-08-05
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Abstract

Abstract A method for forming a solder-bumped circuit trace on a planar dielectric substrate includes fabricating a trace having an intersection between linear section, depositing onto the trace a uniform thin plate of solder alloy and reflowing the solder alloy to form a bump at the intersection. More particularly, the trace comprises first and second linear sections that intersect at an angle between 45 degrees and 135 degrees and have widths preferably between 50 and 150 microns. The solder plate is deposited, preferably by electroplating, at a thickness between about 10 and 25 microns. Thereafter, when the trace is heated to melt the solder layer, the solder coalesces at the intersection to form the bump.

Inventors

  • 👤 Kevin D. Moore
  • 👤 John W. Stafford
  • 👤 William M. Beckenbaugh
  • 👤 Ken Cholewczynski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 23:25
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/3465; H05K1/00; H05K1/02; H05K1/11; H05K1/111; H05K3/3473; H10; H10W; H10W70/00; H10W70/099; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/09372; H05K2201/09381; H05K2203/00; H05K2203/04; H05K2203/042; H05K2203/043; H05K2203/07; H05K2203/0703; H05K2203/0723; H05K3/02; H05K3/06; H05K3/061; H05K3/062; Y; Y02; Y02P; Y02P70/00; Y02P70/50; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 111 words
A method for forming a solder-bumped circuit trace on a dielectric substrate, said method comprising fabricating a circuit trace on the substrate comprising a first linear section and a second linear section disposed to intersect said first section at intersection so as to form an angle between the sections that is between about 45 degrees and 135 degrees, said trace comprising a solder-wettable metal layer adjacent the substrate and an outer plate composed of a solder alloy and having a uniform thickness, and heating the circuit trace at a temperature effective to melt the solder alloy and to draw the molten solder alloy onto the intersection to form a solder bump.
Claim 2
Independent Claim 111 words
A method for forming a solder-bumped circuit trace on a dielectric substrate, said method comprising fabricating a circuit trace on the substrate comprising a first linear section and a second linear section disposed to intersect said first section at intersection so as to form an angle between the sections that is between about 45 degrees and 135 degrees, said trace comprising a solder-wettable metal layer adjacent the substrate and an outer plate composed of a solder alloy and having a uniform thickness, and heating the circuit trace at a temperature effective to melt the solder alloy and to draw the molten solder alloy onto the intersection to form a solder bump.
Claim 3
Dependent Claim 16 words
A method in accordance with claim 1 wherein the solder-wettable metal layer is formed of copper.
Claim 4
Dependent Claim 26 words
A method in accordance with claim 1 wherein the solder alloy is formed predominantly of metal selected from the group consisting of lead, tin and indium.
Claim 5
Independent Claim 143 words
A method for forming a solder-bumped circuit trace on a dielectric substrate, said method comprising fabricating a circuit trace on the substrate comprising a first linear section and a second linear section, said first section having a generally uniform width less than 500 microns, said second section having a generally uniform width less than 500 microns and being disposed to intersect said first section at an intersection so as to form an angle between the sections that is between about 45 degrees and 135 degrees, said trace comprising a copper layer adjacent the substrate and an outer plate composed of a tin-lead solder alloy and having a uniform thickness less than about 25 microns, and heating the circuit trace at a temperature effective to melt the solder alloy and to draw the molten solder alloy onto the intersection to form a solder bump.
Claim 6
Independent Claim 143 words
A method for forming a solder-bumped circuit trace on a dielectric substrate, said method comprising fabricating a circuit trace on the substrate comprising a first linear section and a second linear section, said first section having a generally uniform width less than 500 microns, said second section having a generally uniform width less than 500 microns and being disposed to intersect said first section at an intersection so as to form an angle between the sections that is between about 45 degrees and 135 degrees, said trace comprising a copper layer adjacent the substrate and an outer plate composed of a tin-lead solder alloy and having a uniform thickness less than about 25 microns, and heating the circuit trace at a temperature effective to melt the solder alloy and to draw the molten solder alloy onto the intersection to form a solder bump.
Claim 7
Dependent Claim 19 words
The method in accordance with claim 4 wherein the first section width is between about 50 and 150 microns.
Claim 8
Dependent Claim 19 words
The method in accordance with claim 4 wherein the second section width is between about 50 and 150 microns.
Claim 9
Dependent Claim 33 words
The method in accordance with claim 4 wherein the solder plate is an electrodeposited plate composed of an alloy comprising between about 35 and 45 weight percent lead and the balance substantially tin.
Claim 10
Dependent Claim 20 words
The method in accordance with claim 4 wherein the solder plate has a thickness between about 10 and 25 microns.
Claim 11
Dependent Claim 18 words
The method in accordance with claim 4 wherein the solder bump has a height greater than 40 microns.
Claim 12
Independent Claim 216 words
A method for manufacturing a printed circuit board comprising a solder-bumped copper circuit trace, said trace comprising a first linear section and a second linear section disposed to intersect said first section at an intersection so as to form an angle between the sections that is between about 45 degrees and 135 degrees, said method comprising applying a metallic copper plate having a uniform thickness onto a dielectric substrate, said plate including the trace and extending to a region adjacent the trace, applying a removable mask onto the copper plate such that the mask covers the adjacent region and defines an opening whereat the trace is exposed, immersing the masked copper plate into an electroplating bath containing dissolved tin and lead ions, and cathodically biasing the plate to codeposit metallic tin and metallic lead onto the exposed trace to form an outer plate of tin-lead solder alloy, whereby the mask prevents deposition onto the adjacent region, removing the mask from the copper plate to expose the adjacent region, etching the copper to remove the adjacent region, whereby the solder plate protects the underlying copper from etching to define the circuit trace, and heating to reflow the solder alloy, whereupon molten solder alloy is drawn onto the intersection from the adjacent sections to form a solder bump.
Claim 13
Independent Claim 216 words
A method for manufacturing a printed circuit board comprising a solder-bumped copper circuit trace, said trace comprising a first linear section and a second linear section disposed to intersect said first section at an intersection so as to form an angle between the sections that is between about 45 degrees and 135 degrees, said method comprising applying a metallic copper plate having a uniform thickness onto a dielectric substrate, said plate including the trace and extending to a region adjacent the trace, applying a removable mask onto the copper plate such that the mask covers the adjacent region and defines an opening whereat the trace is exposed, immersing the masked copper plate into an electroplating bath containing dissolved tin and lead ions, and cathodically biasing the plate to codeposit metallic tin and metallic lead onto the exposed trace to form an outer plate of tin-lead solder alloy, whereby the mask prevents deposition onto the adjacent region, removing the mask from the copper plate to expose the adjacent region, etching the copper to remove the adjacent region, whereby the solder plate protects the underlying copper from etching to define the circuit trace, and heating to reflow the solder alloy, whereupon molten solder alloy is drawn onto the intersection from the adjacent sections to form a solder bump.
Claim 14
Dependent Claim 19 words
The method in accordance with claim 10 wherein the first section width is between about 50 and 150 microns.
Claim 15
Dependent Claim 19 words
The method in accordance with claim 10 wherein the second section width is between about 50 and 150 microns.
Claim 16
Dependent Claim 30 words
The method in accordance with claim 10 wherein the solder plate is composed of an alloy comprising between about 35 and 45 weight percent lead and the balance substantially tin.
Claim 17
Dependent Claim 31 words
The method in accordance with claim 10 wherein the solder plate has a thickness between 10 and 25 microns and the solder bump has a height greater than about 40 microns.

References Cited (Backward Citations)

US3871015A Cited
US3871014A Cited
US4545610A Cited
US4878611A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-11-03 1996-05-04 1996-11-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-11-03 2000-05-04 2000-11-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-11-03 2004-05-04 2004-11-03 $7700.00 Window Closed / Lapsed

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