Patent US5158911A successfully refreshed from Google Patents.
US5158911A
Expired / Lapsed
US
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Method for interconnection between an integrated circuit and a support circuit, and integrated circuit adapted to this method
Assignee: Thomson Composants Microondes
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Filing: 1991-07-23
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Granted: 1992-10-27
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Expires: 2011-07-23
Abstract
Abstract Disclosed is a method for the interconnection of an integrated circuit to a support, replacing the connection wires. An integrated circuit chip is fixed to a support by the brazing of the ground plane metallizations. However, the input/output pads of the integrated circuit are connected to the metallized tracks of the support by means of metallized holes. The method can be applied to microwave circuits. FIG. 3.
Inventors
- 👤 Pierre Quentin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 12:17
CPC Classifications
H; H10; H10W; H10W44/00; H10W44/20; H10W20/00; H10W20/20; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W70/654; H10W70/655; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20; H10W72/50; H10W72/531; H10W72/533; H10W72/534; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W90/00; H10W90/701; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
164 words
A method for interconnecting an integrated circuit semiconductor chip to a supporting circuit, said semiconductor chip having first and second surfaces, a ground metallization disposed on said second surface and an active component region disposed in said first surface, and metallization holes between the first and second surfaces for electrically connecting active components of said active component region to said supporting circuit, said supporting circuit comprising an insulating substrate having a network of metal tracks and a fixing metallization on a connecting surface thereof, wherein said connecting surface is opposed to said second surface, said metallization holes have openings in said second face which are opposed to ends of corresponding metal tracks of said network, comprising the steps of: bonding said metallization holes to said corresponding metal tracks; bonding said second surface to said connecting surface; and etching notches out of the fixing metallization so that the said notches surround ends of said metal tracks, thereby insulating said metal tracks from said fixing metallization.
Claim 2
Independent Claim
164 words
A method for interconnecting an integrated circuit semiconductor chip to a supporting circuit, said semiconductor chip having first and second surfaces, a ground metallization disposed on said second surface and an active component region disposed in said first surface, and metallization holes between the first and second surfaces for electrically connecting active components of said active component region to said supporting circuit, said supporting circuit comprising an insulating substrate having a network of metal tracks and a fixing metallization on a connecting surface thereof, wherein said connecting surface is opposed to said second surface, said metallization holes have openings in said second face which are opposed to ends of corresponding metal tracks of said network, comprising the steps of: bonding said metallization holes to said corresponding metal tracks; bonding said second surface to said connecting surface; and etching notches out of the fixing metallization so that the said notches surround ends of said metal tracks, thereby insulating said metal tracks from said fixing metallization.
Claim 3
Independent Claim
115 words
A method for electrically interconnecting an active component region of an integrated circuit disposed in a first surface of a semiconductor chip to support circuitry disposed on an insulating substrate, comprising the steps of: forming a metallization hole between said first surface and a second surface opposed thereto; forming a ground metallization on said second surface; forming a metal track and a fixing metallization which is electrically insulated from said metal track on a connecting surface of said insulating substrate; and bonding said second surface to said connecting surface so that said metallization hole electrically connects to said metal track and is electrically isolated from regions of said ground metallization which form a ground plane.
Claim 4
Independent Claim
115 words
A method for electrically interconnecting an active component region of an integrated circuit disposed in a first surface of a semiconductor chip to support circuitry disposed on an insulating substrate, comprising the steps of: forming a metallization hole between said first surface and a second surface opposed thereto; forming a ground metallization on said second surface; forming a metal track and a fixing metallization which is electrically insulated from said metal track on a connecting surface of said insulating substrate; and bonding said second surface to said connecting surface so that said metallization hole electrically connects to said metal track and is electrically isolated from regions of said ground metallization which form a ground plane.
Claim 5
Dependent Claim
14 words
A method according to claim 2, wherein: said integrated circuit comprises a microwave circuit.
Claim 6
Dependent Claim
22 words
A method of interconnection according to claim 2, wherein the step of binding comprises brazing said ground metallization to the fixing metallization.
Claim 7
Dependent Claim
51 words
A method of interconnection according to claim 2, wherein the metallization hole in said semiconductor chip electrically connected to a metallized surface on the second face of the integrated circuit chip, which is itself and said metallization surface is brazed to an end of a metallic track of the supporting circuit.
Claim 8
Dependent Claim
43 words
A method of interconnection according to claim 5, wherein: the metallized surface comprises a region of the ground metallization, and said method further comprises the step of etching said ground metallization to electrically isolate said region from other regions of said ground metallization.
Claim 9
Dependent Claim
32 words
A method of interconnection according to claim 5 further comprising the step of: etching notches out of the fixing metallization so that said notches surround and insulate the ends of the tracks.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-10-27 | 1996-04-27 | 1996-10-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-10-27 | 2000-04-27 | 2000-10-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-10-27 | 2004-04-27 | 2004-10-27 | $7700.00 | Window Closed / Lapsed |