Patent US5157635A successfully refreshed from Google Patents.
US5157635A
Expired / Lapsed
US
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Input signal redriver for semiconductor modules
Assignee: International Business Machines Corp
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Filing: 1991-07-09
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Granted: 1992-10-20
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Expires: 2011-07-09
Abstract
Abstract A semiconductor packaging subassembly is described in which a plurality of modules or chips, repsonsive to a plurality of common input signals, are provided with input signal redriver circuits. Each redriver circuit is responsive to an input and provides an output signal to each the of chips in the subassembly. The preferred embodiment is directed to a multi-module memory arrangement in which input signals including CAS, RAS, W and address signals are received and redriven.
Inventors
- 👤 Wayne F. Ellis
- 👤 Erich Klink
- 👤 Knut Najmann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 22:11
CPC Classifications
G; G11; G11C; G11C8/00; G11C8/18; G11C7/00; G11C7/22
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
127 words
A semiconductor subassembly comprising a plurality of discrete semiconductor devices each having a plurality of input and output terminals, each semiconductor device being responsive to at least one common input signal to be applied to a plurality of the semiconductor devices, the improvement comprising: redriver means being an integral part of a first one of said discrete semiconductor devices, each redriver means being responsive to said at least one common input signal applied to said subassembly for providing a redriver output signal to a redriver output terminal of said first one of said discrete semiconductor devices, and means for connecting said redriver output terminal to an input terminal of at least one of said plurality of said semiconductor devices, including said first one of said semiconductor devices.
Claim 2
Dependent Claim
127 words
A semiconductor subassembly comprising a plurality of discrete semiconductor devices each having a plurality of input and output terminals, each semiconductor device being responsive to at least one common input signal to be applied to a plurality of the semiconductor devices, the improvement comprising: redriver means being an integral part of a first one of said discrete semiconductor devices, each redriver means being responsive to said at least one common input signal applied to said subassembly for providing a redriver output signal to a redriver output terminal of said first one of said discrete semiconductor devices, and means for connecting said redriver output terminal to an input terminal of at least one of said plurality of said semiconductor devices, including said first one of said semiconductor devices.
Claim 3
Dependent Claim
16 words
The semiconductor subassembly of claim 1 wherein said subassembly includes at least one semiconductor memory module.
Claim 4
Dependent Claim
18 words
The semiconductor subassembly of claim 2 wherein said semiconductor memory module comprises at least tow semiconductor memory devices.
Claim 5
Dependent Claim
19 words
The semiconductor subassembly of claim 1 wherein at least one of said semiconductor devices comprises a semiconductor memory device.
Claim 6
Dependent Claim
120 words
A semiconductor memory assembly comprising a plurality of memory modules, each memory module having a plurality of input terminals, each memory module being responsive to a plurality of input signals, at least one of said input signals is to be provided to all of said memory modules, the improvement comprising: a plurality of redriver circuit means, each being an integral part of a different memory module, at least one of said redriver circuit means being responsive to said one of said plurality of input signals applied to said assembly for generating output signals to be provided to an input terminal of each of said memory modules, including the memory module with which said redriver circuit means is an integral part.
Claim 7
Dependent Claim
120 words
A semiconductor memory assembly comprising a plurality of memory modules, each memory module having a plurality of input terminals, each memory module being responsive to a plurality of input signals, at least one of said input signals is to be provided to all of said memory modules, the improvement comprising: a plurality of redriver circuit means, each being an integral part of a different memory module, at least one of said redriver circuit means being responsive to said one of said plurality of input signals applied to said assembly for generating output signals to be provided to an input terminal of each of said memory modules, including the memory module with which said redriver circuit means is an integral part.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-10-20 | 1996-04-20 | 1996-10-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-10-20 | 2000-04-20 | 2000-10-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-10-20 | 2004-04-20 | 2004-10-20 | $7700.00 | Window Closed / Lapsed |