US5157322A
Expired / Lapsed
US
⏱️ 0.0 years remaining
PNP transistor base drive compensation circuit
Assignee: National Semiconductor Corp
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Filing: 1991-08-13
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Granted: 1992-10-20
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Expires: 2011-08-13
Abstract
Abstract In an integrated circuit a PNP current mirror can lose its current reflection accuracy when low Beta transistors are involved. Since the conventional PNP transistors can often have low Beta this can become a serious problem particularly with high current gain plural output current mirrors. In the invention a compensation current is fed to the current mirror to increase the PNP transistor base currents as an inverse function of Beta. Several alternative circuit embodiments are also disclosed.
Inventors
- 👤 Willam D. Llewellyn
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 03:09
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/56; H03F3/00; H03F3/45; H03F3/45071
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
140 words
A current mirror circuit having an input terminal, a current gain of N, and having the capability of compensating the base current in low current gain PNP transistors, said circuit comprising: a plurality of current mirror connected PNP output transistors coupled to receive base currents that are related to an input current applied to said input terminal; a PNP sensing transistor that is formed in the manufacturing process in the same way that said plurality of PNP output transistors are formed; means for passing a current, related to said input current, through said PNP sensing transistor; means for responding to the base current flowing in said PNP sensing transistor; means for multiplying said PNP sensing transistor base current by the factor N; and means for passing said multiplied base current through the bases of said plurality of PNP output transistors.
Claim 2
Dependent Claim
140 words
A current mirror circuit having an input terminal, a current gain of N, and having the capability of compensating the base current in low current gain PNP transistors, said circuit comprising: a plurality of current mirror connected PNP output transistors coupled to receive base currents that are related to an input current applied to said input terminal; a PNP sensing transistor that is formed in the manufacturing process in the same way that said plurality of PNP output transistors are formed; means for passing a current, related to said input current, through said PNP sensing transistor; means for responding to the base current flowing in said PNP sensing transistor; means for multiplying said PNP sensing transistor base current by the factor N; and means for passing said multiplied base current through the bases of said plurality of PNP output transistors.
Claim 3
Dependent Claim
57 words
The current mirror circuit of claim 1 wherein said plurality of PNP output transistors is divided up into groups of output elements wherein each group has a common base node that is supplied with a compensated current by said means for multiplying and said means for multiplying has plural outputs for separately supplying said common base nodes.
Claim 4
Dependent Claim
32 words
The current mirror circuit of claim 1 wherein said plurality of PNP output transistors have their bases commonly connected to a single base node which is coupled to said means for multiplying.
Claim 5
Dependent Claim
38 words
The current mirror circuit of claim 1 wherein said circuit is configured to sink said input current and further comprises a first NPN transistor current mirror coupled between said sensing transistor and the source of said input current.
Claim 6
Dependent Claim
44 words
The current mirror circuit of claim 4 wherein said first NPN transistor current mirror includes means for responding to an input voltage applied to said circuit input terminal whereby said current passed through said sensing transistor is a linear function of said input voltage.
Claim 7
Dependent Claim
48 words
The current mirror circuit of claim 4 wherein said first NPN transistor current mirror includes a nonlinear element and means for responding to an input voltage applied to said circuit input terminal whereby said current passed through said sensing transistor is an exponential function of said input voltage.
Claim 8
Dependent Claim
25 words
The current mirror circuit of claim 4 wherein said first NPN current mirror responds to an input current which is replicated in said sensing transistor.
Claim 9
Dependent Claim
38 words
The current mirror circuit of claim 4 further including a second NPN transistor current mirror having an input coupled to said base of said sensing transistor and an output coupled to said bases of said PNP output transistors.
Claim 10
Dependent Claim
20 words
The current mirror circuit of claim 8 wherein said second NPN transistor current mirror has a current gain of N.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-10-20 | 1996-04-20 | 1996-10-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-10-20 | 2000-04-20 | 2000-10-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-10-20 | 2004-04-20 | 2004-10-20 | $7700.00 | Window Closed / Lapsed |