Substrate voltage generator for semiconductor device

Claim 2

A substrate voltage generator for a semiconductor device having a substrate comprising: an oscillator for generating an oscillating signal, an oscillation period of which is maintained constant by means for compensating for temperature variations; a voltage pump driver for providing two clock signals having a phase difference of 180 degrees relative to each other in response to the oscillating signal received from said oscillator; a level detector for providing a third clock signal when the substrate voltage is not a predetermined level; and an oscillator driver for providing a bias voltage to said oscillator according to the third clock signal received from said level detector.

Claim 3

A substrate voltage generator according to claim 1, wherein the means for compensating for temperature variations comprises a temperature dependent resistance means.

Claim 4

A substrate voltage generator according to claim 2, wherein the temperature dependent resistance means comprises at least one semiconductor device arranged in a power supply to said oscillator, said power supply including two terminals at first and second voltage levels respectively.

Claim 5

A substrate voltage generator according to claim 3, wherein at least one semiconductor device comprises an MOS (metal oxide semiconductor) transistor.

Claim 6

A substrate voltage generator according to claim 1, wherein said oscillator includes an odd number of inverters, a pair of PMOS transistors connected between one terminal of a power supply and each of said inverters, and a pair of NMOS transistors connected between said inverters and another terminal of the power supply.

Claim 7

A substrate voltage generator according to claim 1, wherein said voltage pump includes: first to fourth MOS transistors serving as pumping capacitors, having sources and drains commonly connected at first terminals of said transistors, one of said clock signals from said voltage pump driver being applied to the first terminals of the first and third of said MOS transistors, and the other of said clock signals from said pump driver being applied to the first terminals of the second and fourth of said MOS transistors, fifth through eighth MOS transistors serving as first to fourth diodes, respectively, the fifth and eighth transistors having drains and gates commonly connected with gates of the first and fourth transistors, respectively, and sources connected to constitute a substrate voltage node, the sixth and seventh transistors having drains connected with gates of the second and third transistors, respectively, and sources and gates commonly connected to one terminal of a power supply for said generator.

Claim 8

A substrate voltage generator according to claim 6, wherein said fifth through eighth MOS transistors is each formed in a semiconductor substrate, said one clock signals being applied to the substrate of the fifth and seventh transistors, and said other of said clock signals being applied to the substrates of the sixth and eighth transistors.