Patent US5155734A successfully refreshed from Google Patents.
US5155734A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Error correcting device
Assignee: Canon Inc
•
Filing: 1990-02-09
•
Granted: 1992-10-13
•
Expires: 2010-02-09
Abstract
Abstract There is provided an error correcting device for correcting errors of a received message in accordance with a processing program including a plurality of error correcting processes for correcting different numbers of errors, wherein a plurality of check codes which are used to discriminate the shift to either one of the plurality of error correcting processes for correcting different numbers of errors and which are formed by syndromes formed from the reception code are sequentially serially generated, the plurality of check codes are output in parallel and the shift of the process in the processing program is executed in accordance with the check codes which were output in parallel.
Inventors
- 👤 Motokazu Kashida
- 👤 Shinichi Yamashita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 15:07
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/03; H03M13/05; H03M13/13; H03M13/15; H03M13/151; G; G06; G06F; G06F11/00; G06F11/07; G06F11/08; G06F11/10
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
156 words
An error correcting device comprising: (a) a processor for executing a processing program which includes a plurality of error correction processing routines for correcting different numbers of errors, said processor being used to correct errors in a received message; (b) a data bus which is accessible by said processor; (c) syndrome calculating means for calculating a plurality of syndromes by using the received message, said syndrome calculating means serially outputting the plurality of syndromes to said data bus; (d) first means for sequentially forming and serially outputting a plurality of check codes to determine a shift to one of said plurality of code error correction processing routines, wherein the plurality of syndromes on said data bus are used in forming said check codes; (e) second means for outputting said plurality of check codes in parallel; and (f) third means for executing the shift of the processing program in accordance with an output of the second means.
Claim 2
Dependent Claim
156 words
An error correcting device comprising: (a) a processor for executing a processing program which includes a plurality of error correction processing routines for correcting different numbers of errors, said processor being used to correct errors in a received message; (b) a data bus which is accessible by said processor; (c) syndrome calculating means for calculating a plurality of syndromes by using the received message, said syndrome calculating means serially outputting the plurality of syndromes to said data bus; (d) first means for sequentially forming and serially outputting a plurality of check codes to determine a shift to one of said plurality of code error correction processing routines, wherein the plurality of syndromes on said data bus are used in forming said check codes; (e) second means for outputting said plurality of check codes in parallel; and (f) third means for executing the shift of the processing program in accordance with an output of the second means.
Claim 3
Dependent Claim
26 words
A device according to claim 1, wherein said plurality of check codes are codes indicating whether said plurality of syndromes are equal to 0 or not.
Claim 4
Dependent Claim
55 words
A device according to claim 1, wherein said first means includes means for calculating a plurality of coefficients of an error location polynomial by using said plurality of syndromes, and said plurality of check codes are codes indicating whether a numerator or a denominator of said plurality of coefficients is equal to 0 or not.
Claim 5
Dependent Claim
33 words
A device according to claim 1, wherein said second means includes a shift register to which said check codes are serially input and which can output in parallel codes stored in each register.
Claim 6
Dependent Claim
40 words
A device according to claim 1, wherein said third means includes a discriminating device to discriminate whether a pattern of the check codes which were output in parallel coincides with a special code pattern to shift the process or not.
Claim 7
Dependent Claim
38 words
A device according to claim 5, wherein a plurality of said special code patterns are prepared and said discriminating device sequentially discriminates whether said plurality of code patterns coincide with a pattern of the check codes or not.
Claim 8
Dependent Claim
54 words
A device according to claim 5, wherein said third means includes a program counter to determine a processing step of the processor and said program counter is set by preset data corresponding to either one of said plurality of kinds of error correction processing routines in accordance with an output of said discriminating device.
Claim 9
Dependent Claim
47 words
A device according to claim 1, wherein said third means includes a data table to which the check codes which were output in parallel are input and which selectively reads out a plurality of preset data corresponding to said plurality of kinds of error correction processing routines.
Claim 10
Dependent Claim
35 words
A device according to claim 8, wherein said third means includes a program counter to determine a processing step of the processor and said program counter is preset by an output of said data table.
Claim 11
Dependent Claim
155 words
An error correcting device comprising: (a) a processor for executing a processing program which includes a plurality of error correction processing routines for correcting different numbers of errors, said processor being used to correct errors in a received message, and said processor generating special code patterns to shift the processing thereof; (b) first means for sequentially forming and serially outputting a plurality of check codes to determine a shift to one of said plurality of error correction processing routines, wherein said received message is used in forming said check codes; (c) second means for outputting said plurality of check codes in parallel; (d) discriminating means for discriminating whether a pattern of the check codes which were output in parallel by the second means coincides with the special code patterns or not; and (e) third means for executing the shift of the processing in the processing program in accordance with an output of said discriminating means.
Claim 12
Dependent Claim
155 words
An error correcting device comprising: (a) a processor for executing a processing program which includes a plurality of error correction processing routines for correcting different numbers of errors, said processor being used to correct errors in a received message, and said processor generating special code patterns to shift the processing thereof; (b) first means for sequentially forming and serially outputting a plurality of check codes to determine a shift to one of said plurality of error correction processing routines, wherein said received message is used in forming said check codes; (c) second means for outputting said plurality of check codes in parallel; (d) discriminating means for discriminating whether a pattern of the check codes which were output in parallel by the second means coincides with the special code patterns or not; and (e) third means for executing the shift of the processing in the processing program in accordance with an output of said discriminating means.
Claim 13
Dependent Claim
38 words
A device according to claim 10, wherein a plurality of said special code patterns are prepared and said discriminating means sequentially discriminates whether said plurality of code patterns coincide with a pattern of the check codes or not.
Claim 14
Dependent Claim
53 words
A device according to claim 10, wherein said third means includes a program counter to determine a processing step of the processor and said program counter is set by preset data corresponding to one of said plurality of kinds of error correction processing routines in accordance with an output of said discriminating means.
Claim 15
Dependent Claim
147 words
An error correcting device comprising: (a) a processor for executing a processing program which includes a plurality of error correction processing routines for correcting different numbers of errors, said processor being used to correct errors in a received message; (b) first means for sequentially forming and serially outputting a plurality of check codes to determine a shift to one of said plurality of error correction processing routines, said received message being used in forming said check codes; (c) second means for outputting said plurality of check codes in parallel; (d) a data table for selectively reading out a plurality of data corresponding to said plurality of error correction processing routines in accordance with an output of the second means; and (e) third means for executing the shift of the process in the processing program in accordance with the data which was read out of the data table.
Claim 16
Dependent Claim
147 words
An error correcting device comprising: (a) a processor for executing a processing program which includes a plurality of error correction processing routines for correcting different numbers of errors, said processor being used to correct errors in a received message; (b) first means for sequentially forming and serially outputting a plurality of check codes to determine a shift to one of said plurality of error correction processing routines, said received message being used in forming said check codes; (c) second means for outputting said plurality of check codes in parallel; (d) a data table for selectively reading out a plurality of data corresponding to said plurality of error correction processing routines in accordance with an output of the second means; and (e) third means for executing the shift of the process in the processing program in accordance with the data which was read out of the data table.
Claim 17
Dependent Claim
35 words
A device according to claim 13, wherein said third means includes a program counter to determine a processing step of the processor and said program counter is set by an output by the data table.
References Cited (Backward Citations)
US3685014A
Cited
US4107652A
Cited
US4142174A
Cited
US4555729A
Cited
US4567594A
Cited
US4618954A
Cited
US4696007A
Cited
US4951282A
Cited
US4958349A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-10-13 | 1996-04-13 | 1996-10-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-10-13 | 2000-04-13 | 2000-10-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-10-13 | 2004-04-13 | 2004-10-13 | $7700.00 | Window Closed / Lapsed |