US5155393A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Clock selection for storage elements of integrated circuits
Assignee: Atmel Corp
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Filing: 1991-09-06
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Granted: 1992-10-13
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Expires: 2011-09-06
Abstract
Abstract A clock circuit having a logic gate with an output supplying a clock signal to a clock input of a storage element and with plural inputs, including an input connected to an external contact for receiving an external clock signal and an input connected to a logic circuit to receive a logic term, such as a product term or sum-of-products term. The logic gate logically combines the internally generated logic with the external clock signal to produce the clock signal for the storage element. The logic gate may be an AND, OR, NAND or NOR gate. A multiplexer with an output connected to an input of the logic gate and responsive to a control signal may select one of two or more logic terms, one of two or more external clock signals, or a fixed voltage signal.
Inventors
- 👤 Geoffrey S. Gongwer
- 👤 Keith H. Gudger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 22:42
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/096; G; G11; G11C; G11C7/00; G11C7/22; G11C8/00; G11C8/18
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
192 words
In an integrated circuit having at least one storage element with a clock input, a clock circuit part of said integrated circuit for supplying a clock signal to said clock input of said storage element, the clock circuit comprising a logic gate having a plurality of inputs and an output, said output of said logic gate supplying said clock signal and connected to said clock input of said storage element for delivering said clock signal thereto, at least one of said plurality of inputs of said logic gate coupled to an external contact of the integrated circuit so as to be capable of receiving an external clock signal from outside of the integrated circuit, at least one other of said plurality of inputs of said logic gate coupled to a logic circuit of part of said integrated circuit for receiving a product term selected from a plurality of product terms from said logic circuit by a multiplexer responsive to a control signal, said multiplexer having a plurality of inputs connected to said logic circuit to receive said plurality of product terms and an output connected to an input of said logic gate.
Claim 2
Dependent Claim
192 words
In an integrated circuit having at least one storage element with a clock input, a clock circuit part of said integrated circuit for supplying a clock signal to said clock input of said storage element, the clock circuit comprising a logic gate having a plurality of inputs and an output, said output of said logic gate supplying said clock signal and connected to said clock input of said storage element for delivering said clock signal thereto, at least one of said plurality of inputs of said logic gate coupled to an external contact of the integrated circuit so as to be capable of receiving an external clock signal from outside of the integrated circuit, at least one other of said plurality of inputs of said logic gate coupled to a logic circuit of part of said integrated circuit for receiving a product term selected from a plurality of product terms from said logic circuit by a multiplexer responsive to a control signal, said multiplexer having a plurality of inputs connected to said logic circuit to receive said plurality of product terms and an output connected to an input of said logic gate.
Claim 3
Dependent Claim
164 words
In an integrated circuit having at least one storage element with a clock input, a clock circuit part of said integrated circuit for supplying a clock signal to said clock input of said storage element, the clock circuit comprising a logic gate having a plurality of inputs and an output, said output of said logic gate supplying said clock signal and connected to said clock input of said storage element for delivering said clock signal thereto, at least one of said plurality of inputs of said logic gate coupled to an external contact of the integrated circuit so as to be capable of receiving an external clock signal from outside of the integrated circuit, at least one other of said plurality of inputs of said logic gate coupled to a logic circuit part of said integrated circuit for receiving a logic term therefrom, said logic term being connected to both said input of said logic gate and a data input of the storage element.
Claim 4
Dependent Claim
164 words
In an integrated circuit having at least one storage element with a clock input, a clock circuit part of said integrated circuit for supplying a clock signal to said clock input of said storage element, the clock circuit comprising a logic gate having a plurality of inputs and an output, said output of said logic gate supplying said clock signal and connected to said clock input of said storage element for delivering said clock signal thereto, at least one of said plurality of inputs of said logic gate coupled to an external contact of the integrated circuit so as to be capable of receiving an external clock signal from outside of the integrated circuit, at least one other of said plurality of inputs of said logic gate coupled to a logic circuit part of said integrated circuit for receiving a logic term therefrom, said logic term being connected to both said input of said logic gate and a data input of the storage element.
Claim 5
Independent Claim
101 words
A method of supplying a clock signal to a clock input of a storage element in an integrated circuit comprising receiving an externally generated clock signal from outside of the integrated circuit at an external contact of the integrated circuit, generating a plurality of product terms in a logic circuit part of the integrated circuit, and selecting one of said product terms as a logic term, logically combining said externally generated clock signal with said logic term to form a combined clock signal, and applying said combined clock signal to said clock input of said storage element in said integrated circuit.
Claim 6
Independent Claim
101 words
A method of supplying a clock signal to a clock input of a storage element in an integrated circuit comprising receiving an externally generated clock signal from outside of the integrated circuit at an external contact of the integrated circuit, generating a plurality of product terms in a logic circuit part of the integrated circuit, and selecting one of said product terms as a logic term, logically combining said externally generated clock signal with said logic term to form a combined clock signal, and applying said combined clock signal to said clock input of said storage element in said integrated circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-10-13 | 1996-04-13 | 1996-10-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-10-13 | 2000-04-13 | 2000-10-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-10-13 | 2004-04-13 | 2004-10-13 | $7700.00 | Window Closed / Lapsed |