Method for manufacturing a BiCMOS semiconductor device having a lateral bipolar transistor

Claim 1

A method for manufacturing a semiconductor device in which a bipolar transistor and a CMOS transistor are formed on a first conductive semiconductor substrate, comprising the steps of; (i) determining a bipolar transistor formation region, an n-channel MOS transistor formation region and a p-channel MOS transistor formation region by an isolation oxide film on the first conductive semiconductor substrate, then thermally oxidizing the whole surface of the semiconductor substrate including the isolation oxide film so as to form a gate oxide film over the three regions, and injecting first conductive impurities in the bipolar transistor formation region at a low density so as to form an active base layer, (ii) opening the gate oxide film in the bipolar transistor formation region by a predetermined pattern so as to form a gate oxide film opening on the active base layer, (iii) forming a conductive film for gate formation having second conductive impurities doped at a high density over the semiconductor substrate including the opening, then patterning the conductive film so as to form a gate in the n-channel and p-channel MOS transistor formation regions, and simultaneously forming a gate in the bipolar transistor formation region over a gate oxide film region remaining when forming the opening, and an opening region on the active base layer, (iv) forming a source-drain in the n-channel MOS transistor formation region, and simultaneously forming a collector electrode pullout region in the gate oxide film region remaining on an active base layer surface in the bipolar transistor formation region, (v) forming a source-drain in the p-channel MOS transistor formation region, and simultaneously forming a base electrode pullout region in the opening region on the active base layer surface which is opposed to the collector electrode pullout region with a gate interposed in the bipolar transistor formation region, (vi) laminating a layer insulating film over the semiconductor substrate including the isolation oxide film, gate, collector electrode pullout region and base electrode pullout region, and (vii) carrying out a heat treatment so as to reflow the layer insulating film, and automatically doping the second conductive impurities from the gate to the active base layer in the bipolar transistor formation region by the heat treatment so as to form an emitter region on the active base layer surface just below the gate.

Claim 2

A method for manufacturing a semiconductor device in which a bipolar transistor and a CMOS transistor are formed on a first conductive semiconductor substrate, comprising the steps of; (i) determining a bipolar transistor formation region, an n-channel MOS transistor formation region and a p-channel MOS transistor formation region by an isolation oxide film on the first conductive semiconductor substrate, then thermally oxidizing the whole surface of the semiconductor substrate including the isolation oxide film so as to form a gate oxide film over the three regions, and injecting first conductive impurities in the bipolar transistor formation region at a low density so as to form an active base layer, (ii) opening the gate oxide film in the bipolar transistor formation region by a predetermined pattern so as to form a gate oxide film opening on the active base layer, (iii) forming a conductive film for gate formation having second conductive impurities doped at a high density over the semiconductor substrate including the opening, then patterning the conductive film so as to form a gate in the n-channel and p-channel MOS transistor formation regions, and simultaneously forming a gate in the bipolar transistor formation region over a gate oxide film region remaining when forming the opening, and an opening region on the active base layer, (iv) forming a source-drain in the n-channel MOS transistor formation region, and simultaneously forming a collector electrode pullout region in the gate oxide film region remaining on an active base layer surface in the bipolar transistor formation region, (v) forming a source-drain in the p-channel MOS transistor formation region, and simultaneously forming a base electrode pullout region in the opening region on the active base layer surface which is opposed to the collector electrode pullout region with a gate interposed in the bipolar transistor formation region, (vi) laminating a layer insulating film over the semiconductor substrate including the isolation oxide film, gate, collector electrode pullout region and base electrode pullout region, and (vii) carrying out a heat treatment so as to reflow the layer insulating film, and automatically doping the second conductive impurities from the gate to the active base layer in the bipolar transistor formation region by the heat treatment so as to form an emitter region on the active base layer surface just below the gate.