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US5139964A
Expired / Lapsed
US
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Method for forming isolation region of semiconductor device
Assignee: Sharp Corp
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Filing: 1991-01-28
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Granted: 1992-08-18
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Expires: 2011-01-28
Abstract
Abstract An improved LOCOS method for forming an isolation region with a higher breakdown voltage and a reduced width in a semiconductor device, comprising the steps of: (a) forming on a silicon substrate a silicon nitride layer having a predetermined pattern and a tapered-slant side wall, between the silicon nitride layer and the silicon substrate being formed a silicon oxide layer, (b) subjecting the silicon substrate to an isotropic etching using the silicon nitride layer as a mask to form a recess on the substrate, the recess extending to and under the side wall of the silicon nitride layer, and (c) forming a channel stopper region by implanting an impurity into the silicon substrate through the recess-formed surface, and thereafter growing and forming a LOCOS layer on the recess-formed surface to obtain an isolation region.
Inventors
- 👤 Shigeo Onishi
- 👤 Kenichi Tanaka
- 👤 Yoshimitsu Yamauchi
- 👤 Keizo Sakiyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 03:12
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/69; H10P50/691; H10P50/693; H10P50/694; H10P14/00; H10P14/60; H10P14/61; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/0124; H10W10/10; H10W10/13; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/944
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
172 words
A method for forming an isolation region in a semiconductor device, comprising the steps of: (a) forming on a silicon substrate a silicon oxide layer and thereafter forming on the silicon oxide layer a silicon nitride layer having a predetermined pattern and a tapered-slant side wall, (b) subjecting the silicon substrate to an isotropic etching using the silicon nitride layer as a mask to form a recess in the substrate, the recess extending to and under the side wall of the silicon nitride layer and formed to have a tapered surface positioned under said tapered-slant side wall, and (c) forming a channel stopper region by implanting an impurity into the silicon substrate through the recess-formed surface, and thereafter growing and forming a field oxide layer on the recess-formed surface to obtain an isolation region, wherein said recess formed in the substrate has a depth of about 1000 to 2000 Å, a width of about 700 to 1400 Å and said field oxide layer has a tapered angle of about 20° to 30°.
Claim 2
Independent Claim
172 words
A method for forming an isolation region in a semiconductor device, comprising the steps of: (a) forming on a silicon substrate a silicon oxide layer and thereafter forming on the silicon oxide layer a silicon nitride layer having a predetermined pattern and a tapered-slant side wall, (b) subjecting the silicon substrate to an isotropic etching using the silicon nitride layer as a mask to form a recess in the substrate, the recess extending to and under the side wall of the silicon nitride layer and formed to have a tapered surface positioned under said tapered-slant side wall, and (c) forming a channel stopper region by implanting an impurity into the silicon substrate through the recess-formed surface, and thereafter growing and forming a field oxide layer on the recess-formed surface to obtain an isolation region, wherein said recess formed in the substrate has a depth of about 1000 to 2000 Å, a width of about 700 to 1400 Å and said field oxide layer has a tapered angle of about 20° to 30°.
Claim 3
Dependent Claim
34 words
The method for forming an isolation region of claim 1 in which the silicon nitride layer having a predetermined pattern and a tapered-slant side wall has a thickness of about 150 to 250 nm.
Claim 4
Dependent Claim
34 words
The method for forming an isolation region of claim 1 in which the silicon oxide layer between the silicon nitride layer and the silicon substrate has a thickness of about 10 to 30 nm.
Claim 5
Dependent Claim
19 words
The method for forming an isolation region of claim 1 in which the isotropic etching is a plasma etching.
Claim 6
Dependent Claim
32 words
The method for forming an isolation region of claim 1 in which the impurity is implanted into the silicon substrate at a concentration of 3×10 13 to 6×10 13 /cm 2 .
Claim 7
Dependent Claim
36 words
The method for forming an isolation region of claim 1 in which said field oxide layer is grown and formed under a temperature of 1000° to 1100° C. and a moisture of 90 to 95% RH.
References Cited (Backward Citations)
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JPS61283147A
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JPS6213047A
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JPS63280437A
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JPS63296225A
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US4965221A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-08-18 | 1996-02-17 | 1996-08-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-08-18 | 2000-02-17 | 2000-08-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-08-18 | 2004-02-17 | 2004-08-18 | $7700.00 | Window Closed / Lapsed |