US5135885A
Expired / Lapsed
US
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Method of manufacturing silicon carbide fets
Assignee: Sharp Corp
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Filing: 1990-03-27
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Granted: 1992-08-04
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Expires: 2010-03-27
Abstract
Abstract A method of manufacturing a semiconductor device comprises the steps of (i) forming a SiC monocrystal layer over the entire surface of a semiconductor substrate; (ii) forming a boron ion implanted layer, which is substantially a thin film, by implanting a specified amount of boron ions in the surface region of the SiC monocrystal layer; and (iii) forming a high resistance SiC monocrystal layer of a thin film by subjecting the boron ion implanted layer to heat treatment; whereby the high resistance SiC monocrystal layer can be function at least as an electric insulating layer.
Inventors
- 👤 Katsuki Furukawa
- 👤 Yoshihisa Fujii
- 👤 Mitsuhiro Shigeta
- 👤 Akira Suzuki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 18:02
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/674; H10D30/6741; H10D30/80; H10D30/87; H10D30/875; H10D62/00; H10D62/80; H10D62/83; H10D62/832; H10D62/8325; Y; Y10; Y10S; Y10S438/00; Y10S438/931
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
126 words
A method of manufacturing a semiconductor device containing Si, comprising the steps of: (i) forming a SiC monocrystal layer over the entire surface of a semiconductor substrate containing Si; (ii) forming a substantially thin film boron ion implanted layer by implanting a specified amount of boron ions one or more times in the surface region of said SiC monocrystal layer, said boron ions being implanted under conditions wherein the accelerating voltage used therefor is from 100 keV to 400 keV; and (iii) forming a thin film high resistance SiC monocrystal layer by subjecting said boron ion implanted layer to heat treatment at a temperature from 1000° C. to 1400° C.; whereby said high resistance SiC monocrystal layer can function at least as an electric insulating layer.
Claim 2
Independent Claim
126 words
A method of manufacturing a semiconductor device containing Si, comprising the steps of: (i) forming a SiC monocrystal layer over the entire surface of a semiconductor substrate containing Si; (ii) forming a substantially thin film boron ion implanted layer by implanting a specified amount of boron ions one or more times in the surface region of said SiC monocrystal layer, said boron ions being implanted under conditions wherein the accelerating voltage used therefor is from 100 keV to 400 keV; and (iii) forming a thin film high resistance SiC monocrystal layer by subjecting said boron ion implanted layer to heat treatment at a temperature from 1000° C. to 1400° C.; whereby said high resistance SiC monocrystal layer can function at least as an electric insulating layer.
Claim 3
Dependent Claim
35 words
A method according to claim 1, wherein said boron ion implanted layer is formed on the surface region of said SiC monocrystal layer as a thin film having a thickness of 1 μm or under.
Claim 4
Dependent Claim
44 words
A method according to claim 1, wherein said high resistance SiC monocrystal layer is so formed to have a resistivity of 600 Ω·cm or more so as to permit operation of said device at temperatures as high as of 200° C. to 500° C.
Claim 5
Dependent Claim
36 words
A method according to claim 1, wherein said high resistance SiC monocrystal layer is formed in the surface region of said SiC monocrystal layer as a thin film having a thickness of 1 μm or under.
Claim 6
Dependent Claim
27 words
A method according to claim 1, wherein said boron ion implanted layer is subjected to heat treatment in an atmosphere of inert gas or N 2 gas.
Claim 7
Dependent Claim
46 words
A method according to claim 1, wherein a Schottky filed effect transistor is formed, having a further SiC monocrystal layer formed over the entire surface of said high resistance SiC monocrystal layer and source, gate and drain electrodes are formed on said further SiC monocrystal layer.
Claim 8
Dependent Claim
68 words
A method according to claim 1, wherein an insulated gate field effect transistor is formed having source and drain regions provided on a specified regions of said high resistance SiC monocrystal layer, source and drain electrodes electrically connected to said source and drain regions and a gate electrode provided on said high resistance SiC monocrystal layer between said source and drain regions with a gate insulating film intervening.
Claim 9
Dependent Claim
68 words
A method according to claim 2, wherein said boron ion implanted layer is a thin film having a thickness of approximately 0.5 μm, which is formed on the surface region of said SiC monocrystal layer by implanting boron ions two times under conditions such that the accelerating voltages are 200 keV and 100 keV, respectively, and the amount of implanted boron ions is 1×10 15 CM -2 .
Claim 10
Dependent Claim
74 words
A method according to claim 2, wherein said boron ion implanted layer is a thin film having a thickness of approximately 0.5 μm, which is formed on the surface region of said SiC monocrystal layer by implanting boron ions two times under conditions said that the accelerating voltages are 200 keV and 100 keV, respectively, and the amounts of implanted boron ions are 1×10 15 cm -2 and 5×10 14 cm -2 , respectfully.
Claim 11
Independent Claim
55 words
A method according to claims 3, 4, 5, 6, or 8, wherein said high resistance SiC monocrystal layer is so formed as to have a thickness of 0.5 μm and a resistivity of 600 Ω·cm by heating said boron ion implanted layer in an atmosphere of Ar gas at approximately 1,300° C. for 30 minutes.
Claim 12
Dependent Claim
48 words
A method according to claim 6, wherein said high resistance SiC monocrystal layer electrically insulates said further SiC monocrystal layer from said semiconductor substrate, and said further SiC monocrystal layer is a channel layer over the entire surface at temperature as high as 200° C. to 500° C.
Claim 13
Dependent Claim
41 words
A method according to claim 7, wherein said high resistance SiC monocrystal layer is a channel layer and an electric insulating layer for insulating said channel layer from said semiconductor substrate at temperatures as high as 200° C. to 500° C.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1995-08-04 | 1996-02-03 | 1996-08-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-08-04 | 2000-02-03 | 2000-08-04 | $3760.00 | Window Closed / Lapsed |
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