US5134481A — Method of automatically measuring the horizontal …

Claim 1

Independent Claim 111 words

Method of automatically measuring the broadcasting standard of a composite synchronism video signal comprising synchronization impulses at horizontal line frequency, characterized in that it comprises the following steps: effecting a count of a number of impulses, which impulses have a repeat frequency higher than said line frequency, intervening between two successive, line frequency impulses to produce a count value representative of the line frequency; storing the said count value, corresponding to said number of impulses, to obtain the line frequency; and effecting successive check counts, int he reverse order, of the same said impulses between subsequent line frequency impulses until a change of frequency of the composite synchronism signal is detected.

Claim 2

Dependent Claim 111 words

Method of automatically measuring the broadcasting standard of a composite synchronism video signal comprising synchronization impulses at horizontal line frequency, characterized in that it comprises the following steps: effecting a count of a number of impulses, which impulses have a repeat frequency higher than said line frequency, intervening between two successive, line frequency impulses to produce a count value representative of the line frequency; storing the said count value, corresponding to said number of impulses, to obtain the line frequency; and effecting successive check counts, int he reverse order, of the same said impulses between subsequent line frequency impulses until a change of frequency of the composite synchronism signal is detected.

Claim 3

Dependent Claim 148 words

An electronic circuit for automatically measuring the horizontal synchronization frequency of a composite synchronism signal comprising horizontal synchronization impulses at a line frequency and at least one synchronization impulse at vertical frequency, characterized in that it comprises: a timer receiving on its input said synchronization signal and a clock signal having a predetermined repeat frequency higher than said line frequency; a counter connected downstream from the timer to detect the number of the impulses at clock frequency between two successive impulses at line frequency, said number of impulses being representative of the line frequency; a memory connected two-directionally to the counter for storing said number of impulses; and control logic having inputs connected to outputs of said timer and said counter, and outputs connected to respective inputs of the counter and the memory to enable up or down counting and storing based upon timing signals from the timer.

Claim 4

Dependent Claim 148 words

An electronic circuit for automatically measuring the horizontal synchronization frequency of a composite synchronism signal comprising horizontal synchronization impulses at a line frequency and at least one synchronization impulse at vertical frequency, characterized in that it comprises: a timer receiving on its input said synchronization signal and a clock signal having a predetermined repeat frequency higher than said line frequency; a counter connected downstream from the timer to detect the number of the impulses at clock frequency between two successive impulses at line frequency, said number of impulses being representative of the line frequency; a memory connected two-directionally to the counter for storing said number of impulses; and control logic having inputs connected to outputs of said timer and said counter, and outputs connected to respective inputs of the counter and the memory to enable up or down counting and storing based upon timing signals from the timer.

Claim 5

Dependent Claim 27 words

A circuit according to claim 2, characterized in that said control logic comprises a circuit portion for detecting the change of frequency in said composite synchronism signal.

Claim 6

Dependent Claim 28 words

A circuit according to claim 2, characterized in that said control logic comprises a circuit portion effective to enable the counter to perform said up or down counting.

Claim 7

Dependent Claim 57 words

A circuit according to claim 3, characterized in that said control logic comprises a logic gate of the exclusive OR type having an output connected to said circuit portion and a plurality of inputs connected directly to respective outputs of the counter to check that the down count by said counter has actually gone back to zero.

Claim 8

Dependent Claim 25 words

A circuit according to claim 3, characterized in that said circuit portion comprises a shift register and a logic gate connected downstream from said register.

Claim 9

Dependent Claim 43 words

A circuit according to claim 2, characterized in that said timer comprises a frequency divider whereto said synchronization signal is input directly and which has an output connected to the input side of a logic gate receiving on another input said clock signal.

Claim 10

Dependent Claim 31 words

A circuit according to claim 5, characterized in that said gate of the exclusive OR type carries out a check on a predetermined number of most meaningful bits of the counter.

Claim 11

Dependent Claim 29 words

A circuit according to claim 5, characterized in that said gate of the exclusive OR type carries out a check on the n-1 most meaningful bits of the counter.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1995-07-28	1996-01-27	1996-07-28	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1999-07-28	2000-01-27	2000-07-28	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2003-07-28	2004-01-27	2004-07-28	$7700.00	Window Closed / Lapsed

Method of automatically measuring the horizontal scan frequency of a composite synchronism signal, and an electronic circuit operating in accordance with the method

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