US5128612A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Disposable high performance test head
Assignee: Texas Instruments Inc
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Filing: 1990-07-31
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Granted: 1992-07-07
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Expires: 2010-07-31
Abstract
Abstract A disposable integrated circuit test head (34) communicates a plurality of test signals between test nodes (20) of an integrated circuit and test circuitry. Disposable high-density test head (30) comprises signal platform (24) which includes tape layer (24) and interconnection lines (28). Interconnection lines (28) include signal leads (30) and bumps (32). Interconnection lines (28) coupled with test nodes (20) to electrically connect test nodes (20) with the test circuitry and communicate test signals between test nodes (20) and the test circuitry. Pusher block (36) engages signal platform (24) at tape layer (26) opposite interconnection lines (28) and applies force through tape layer (24) to interconnection lines (28). This allows positive engagement of interconnection lines (28) with test nodes (20). Pusher block (36) comprises rigid force applying plate (38) which adheres to compliant layer (40) at junction (42). Compliant layer (40) absorbs planarity differences between interconnection lines (28) and integrated circuit test nodes (20).
Inventors
- 👤 Thomas J. Aton
- 👤 Rey M. Rincon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 12:25
CPC Classifications
G; G01; G01R; G01R1/00; G01R1/02; G01R1/06; G01R1/067; G01R1/073; G01R1/07307; G01R1/07357
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
196 words
A disposable integrated circuit test head for communicating a plurality of tests signals between test nodes of an integrated circuit and test circuitry, comprising: a tape layer; a plurality of interconnection lines disposed on said tape layer and operable to communicate test signals between the test nodes and the test circuitry; a pusher engaging said tape layer opposite said interconnection lines for applying force through said tape layer to said interconnection lines to provide positive engagement of said interconnection lines with the test nodes, said pusher comprising a rigid force-applying quartz plate and compliant material layer, said compliant material layer disposed between said force-applying plate and said tape layer for absorbing planarity differences as said interconnection lines engage the test nodes; and a vibration circuit mechanically coupled to said tape layer, said vibration circuit including a signal source for providing first and second electrical AC signals to first and second sets of contacts respectively on said quartz plate, said first and second AC signals being of a different phase so as to create a piezoelectric effect to produce vibration of said quartz plate for providing a scrubbing action between said interconnection lines and said test nodes.
Claim 2
Dependent Claim
196 words
A disposable integrated circuit test head for communicating a plurality of tests signals between test nodes of an integrated circuit and test circuitry, comprising: a tape layer; a plurality of interconnection lines disposed on said tape layer and operable to communicate test signals between the test nodes and the test circuitry; a pusher engaging said tape layer opposite said interconnection lines for applying force through said tape layer to said interconnection lines to provide positive engagement of said interconnection lines with the test nodes, said pusher comprising a rigid force-applying quartz plate and compliant material layer, said compliant material layer disposed between said force-applying plate and said tape layer for absorbing planarity differences as said interconnection lines engage the test nodes; and a vibration circuit mechanically coupled to said tape layer, said vibration circuit including a signal source for providing first and second electrical AC signals to first and second sets of contacts respectively on said quartz plate, said first and second AC signals being of a different phase so as to create a piezoelectric effect to produce vibration of said quartz plate for providing a scrubbing action between said interconnection lines and said test nodes.
Claim 3
Dependent Claim
13 words
The apparatus of claim 1, wherein said tape layer comprises a transparent material.
Claim 4
Dependent Claim
16 words
The apparatus of claim 1, wherein said interconnection lines are lithographically patterned on said tape layer.
Claim 5
Dependent Claim
21 words
The apparatus of claim 1 wherein said interconnection lines comprise a plurality of bumps for engaging the integrated circuit test nodes.
Claim 6
Dependent Claim
28 words
The apparatus of claim 4 wherein said bumps comprise a hard metallic material for assuring positive electrical connection between said interconnection lines and the integrated circuit test nodes.
Claim 7
Dependent Claim
21 words
The apparatus of claim 1 wherein said interconnection lines comprise a plurality of bumps for engaging the integrated circuit test nodes.
Claim 8
Dependent Claim
22 words
The apparatus of claim 1, further comprising a ground plane connected to said interconnection lines for providing signal decoupling and impedance control.
Claim 9
Dependent Claim
15 words
The apparatus of claim 7, wherein said ground plane comprises a transparent electrically conductive material.
Claim 10
Dependent Claim
28 words
The apparatus of claim 1, further comprising a plurality of ground leads, said ground leads are proximate to said interconnection lines for providing signal decoupling and impedance control.
Claim 11
Dependent Claim
25 words
The apparatus of claim 9, wherein said interconnection lines comprise a plurality of signal leads and said ground leads are interstitial to said signal leads.
Claim 12
Dependent Claim
29 words
The apparatus of claim 10, wherein said signal leads comprise tapered signal leads and said ground leads comprise tapered ground leads for further enhancing signal decoupling and impedance control.
Claim 13
Dependent Claim
32 words
The apparatus of claim 1, further comprising an aperture disposed through said tape layer and said pusher for permitting access through said tape layer and said pusher and to the integrated circuit.
Claim 14
Dependent Claim
23 words
The apparatus of claim 1, wherein said tape layer comprises a plurality of vias to permit electrical connection therethrough to said interconnection lines.
Claim 15
Dependent Claim
207 words
A disposable integrated circuit test head for simultaneously communicating a plurality of test signals between test nodes of a plurality of integrated circuits and test circuitry, comprising: a tape layer; a plurality of interconnection lines disposed on said tape layer and operable to communicate test signals between the plurality of integrated circuits and the test circuitry; a pusher engaging said tape layer opposite said interconnection lines for applying force through said tape layer to said interconnection to provide positive engagement of said interconnection lines with the test nodes, said pusher comprising a rigid force-applying quartz plate and a compliant material layer, said compliant material layer disposed between said force-applying plate and said tape layer for absorbing planarity differences as said interconnection lines engage the test nodes of the plurality of integrated circuits; and a vibration circuit mechanically coupled to said tape layer, said vibration circuit including a signal source for providing first and second electrical AC signals to first and second sets of contact respectively on said quartz plate, said first and second AC signals being of a different phase so as to create a piezoelectric effect to produce vibration of said quartz plate for providing a scrubbing action between said interconnection lines and said test nodes.
Claim 16
Dependent Claim
207 words
A disposable integrated circuit test head for simultaneously communicating a plurality of test signals between test nodes of a plurality of integrated circuits and test circuitry, comprising: a tape layer; a plurality of interconnection lines disposed on said tape layer and operable to communicate test signals between the plurality of integrated circuits and the test circuitry; a pusher engaging said tape layer opposite said interconnection lines for applying force through said tape layer to said interconnection to provide positive engagement of said interconnection lines with the test nodes, said pusher comprising a rigid force-applying quartz plate and a compliant material layer, said compliant material layer disposed between said force-applying plate and said tape layer for absorbing planarity differences as said interconnection lines engage the test nodes of the plurality of integrated circuits; and a vibration circuit mechanically coupled to said tape layer, said vibration circuit including a signal source for providing first and second electrical AC signals to first and second sets of contact respectively on said quartz plate, said first and second AC signals being of a different phase so as to create a piezoelectric effect to produce vibration of said quartz plate for providing a scrubbing action between said interconnection lines and said test nodes.
Claim 17
Dependent Claim
35 words
The apparatus of claim 14, wherein said interconnection lines further comprise a plurality of bumps integral thereto for providing electrical contact between said interconnection lines and the test nodes of the plurality of integrated circuits.
Claim 18
Dependent Claim
26 words
The apparatus of claim 14, further comprising a ground plane connected to said interconnection lines for providing signal decoupling and impedance control for said interconnection lines.
Claim 19
Independent Claim
243 words
A system for high-performance testing of integrated circuits, comprising: test circuitry for generating and receiving a plurality of test signals for testing the integrated circuits: a disposable integrated circuit test head for communicating the plurality of test signals between the integrated circuit test nodes and said test circuitry, comprising: a tape layer; a plurality of interconnection lines adhered to said tape layer and associated to couple with the test nodes to electrically connect the test nodes to the test circuitry for communicating the test signals between the test nodes and the test circuitry; a pusher block engaging said tape layer opposite said interconnection lines for applying force through said tape layer to said interconnection lines to provide positive engagement of said interconnection lines with the test nodes, said pusher block comprising a rigid force applying quartz plate and a compliant material layer, said compliant material layer position between said force applying plate and said tape layer for absorbing planarity differences as said interconnection lines engage the test nodes; and a vibration circuit mechanically coupled to said tape layer, said vibration circuit including a signal source for providing first and second electrical AC signals to first and second sets of contact respectively on said quartz plate, said first and second AC signals being of a different phase so as to create a piezoelectric effect to produce vibration of said quartz plate for providing a scrubbing action between said interconnection lines and said test nodes.
Claim 20
Independent Claim
243 words
A system for high-performance testing of integrated circuits, comprising: test circuitry for generating and receiving a plurality of test signals for testing the integrated circuits: a disposable integrated circuit test head for communicating the plurality of test signals between the integrated circuit test nodes and said test circuitry, comprising: a tape layer; a plurality of interconnection lines adhered to said tape layer and associated to couple with the test nodes to electrically connect the test nodes to the test circuitry for communicating the test signals between the test nodes and the test circuitry; a pusher block engaging said tape layer opposite said interconnection lines for applying force through said tape layer to said interconnection lines to provide positive engagement of said interconnection lines with the test nodes, said pusher block comprising a rigid force applying quartz plate and a compliant material layer, said compliant material layer position between said force applying plate and said tape layer for absorbing planarity differences as said interconnection lines engage the test nodes; and a vibration circuit mechanically coupled to said tape layer, said vibration circuit including a signal source for providing first and second electrical AC signals to first and second sets of contact respectively on said quartz plate, said first and second AC signals being of a different phase so as to create a piezoelectric effect to produce vibration of said quartz plate for providing a scrubbing action between said interconnection lines and said test nodes.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-07-07 | 1996-01-06 | 1996-07-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-07-07 | 2000-01-06 | 2000-07-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-07-07 | 2004-01-06 | 2004-07-07 | $7700.00 | Window Closed / Lapsed |